Searched refs:TEGRA30_CLK_PLL_M (Results 1 - 7 of 7) sorted by relevance

/linux-4.1.27/arch/mips/boot/dts/include/dt-bindings/clock/
H A Dtegra30-car.h201 #define TEGRA30_CLK_PLL_M 177 macro
/linux-4.1.27/arch/powerpc/boot/dts/include/dt-bindings/clock/
H A Dtegra30-car.h201 #define TEGRA30_CLK_PLL_M 177 macro
/linux-4.1.27/arch/arm64/boot/dts/include/dt-bindings/clock/
H A Dtegra30-car.h201 #define TEGRA30_CLK_PLL_M 177 macro
/linux-4.1.27/arch/metag/boot/dts/include/dt-bindings/clock/
H A Dtegra30-car.h201 #define TEGRA30_CLK_PLL_M 177 macro
/linux-4.1.27/arch/arm/boot/dts/include/dt-bindings/clock/
H A Dtegra30-car.h201 #define TEGRA30_CLK_PLL_M 177 macro
/linux-4.1.27/include/dt-bindings/clock/
H A Dtegra30-car.h201 #define TEGRA30_CLK_PLL_M 177 macro
/linux-4.1.27/drivers/clk/tegra/
H A Dclk-tegra30.c598 { .con_id = "pll_m", .dt_id = TEGRA30_CLK_PLL_M },
945 clks[TEGRA30_CLK_PLL_M] = clk; tegra30_pll_init()
1358 {TEGRA30_CLK_PLL_M, TEGRA30_CLK_CLK_MAX, 0, 1},

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