Searched refs:TEGRA30_CLK_PLL_C (Results 1 - 7 of 7) sorted by relevance

/linux-4.1.27/arch/mips/boot/dts/include/dt-bindings/clock/
H A Dtegra30-car.h199 #define TEGRA30_CLK_PLL_C 175 macro
/linux-4.1.27/arch/powerpc/boot/dts/include/dt-bindings/clock/
H A Dtegra30-car.h199 #define TEGRA30_CLK_PLL_C 175 macro
/linux-4.1.27/arch/arm64/boot/dts/include/dt-bindings/clock/
H A Dtegra30-car.h199 #define TEGRA30_CLK_PLL_C 175 macro
/linux-4.1.27/arch/metag/boot/dts/include/dt-bindings/clock/
H A Dtegra30-car.h199 #define TEGRA30_CLK_PLL_C 175 macro
/linux-4.1.27/arch/arm/boot/dts/include/dt-bindings/clock/
H A Dtegra30-car.h199 #define TEGRA30_CLK_PLL_C 175 macro
/linux-4.1.27/include/dt-bindings/clock/
H A Dtegra30-car.h199 #define TEGRA30_CLK_PLL_C 175 macro
/linux-4.1.27/drivers/clk/tegra/
H A Dclk-tegra30.c591 { .con_id = "pll_c", .dt_id = TEGRA30_CLK_PLL_C },
930 clks[TEGRA30_CLK_PLL_C] = clk; tegra30_pll_init()
1369 {TEGRA30_CLK_HOST1X, TEGRA30_CLK_PLL_C, 150000000, 0},
1373 {TEGRA30_CLK_GR2D, TEGRA30_CLK_PLL_C, 300000000, 0},
1374 {TEGRA30_CLK_GR3D, TEGRA30_CLK_PLL_C, 300000000, 0},
1375 {TEGRA30_CLK_GR3D2, TEGRA30_CLK_PLL_C, 300000000, 0},

Completed in 67 milliseconds