Searched refs:TEGRA30_CLK_GR3D2 (Results 1 - 7 of 7) sorted by relevance

/linux-4.1.27/arch/mips/boot/dts/include/dt-bindings/clock/
H A Dtegra30-car.h120 #define TEGRA30_CLK_GR3D2 98 macro
/linux-4.1.27/arch/powerpc/boot/dts/include/dt-bindings/clock/
H A Dtegra30-car.h120 #define TEGRA30_CLK_GR3D2 98 macro
/linux-4.1.27/arch/arm64/boot/dts/include/dt-bindings/clock/
H A Dtegra30-car.h120 #define TEGRA30_CLK_GR3D2 98 macro
/linux-4.1.27/arch/metag/boot/dts/include/dt-bindings/clock/
H A Dtegra30-car.h120 #define TEGRA30_CLK_GR3D2 98 macro
/linux-4.1.27/arch/arm/boot/dts/include/dt-bindings/clock/
H A Dtegra30-car.h120 #define TEGRA30_CLK_GR3D2 98 macro
/linux-4.1.27/include/dt-bindings/clock/
H A Dtegra30-car.h120 #define TEGRA30_CLK_GR3D2 98 macro
/linux-4.1.27/drivers/clk/tegra/
H A Dclk-tegra30.c706 { .dev_id = "3d2", .dt_id = TEGRA30_CLK_GR3D2 },
1125 TEGRA_INIT_DATA_INT("3d2", mux_pllmcpa, CLK_SOURCE_3D2, 98, TEGRA_PERIPH_MANUAL_RESET, TEGRA30_CLK_GR3D2),
1375 {TEGRA30_CLK_GR3D2, TEGRA30_CLK_PLL_C, 300000000, 0},

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