Searched refs:TEGRA20_CLK_SCLK (Results 1 - 7 of 7) sorted by relevance

/linux-4.1.27/arch/mips/boot/dts/include/dt-bindings/clock/
H A Dtegra20-car.h129 #define TEGRA20_CLK_SCLK 107 macro
/linux-4.1.27/arch/powerpc/boot/dts/include/dt-bindings/clock/
H A Dtegra20-car.h129 #define TEGRA20_CLK_SCLK 107 macro
/linux-4.1.27/arch/arm64/boot/dts/include/dt-bindings/clock/
H A Dtegra20-car.h129 #define TEGRA20_CLK_SCLK 107 macro
/linux-4.1.27/arch/metag/boot/dts/include/dt-bindings/clock/
H A Dtegra20-car.h129 #define TEGRA20_CLK_SCLK 107 macro
/linux-4.1.27/arch/arm/boot/dts/include/dt-bindings/clock/
H A Dtegra20-car.h129 #define TEGRA20_CLK_SCLK 107 macro
/linux-4.1.27/include/dt-bindings/clock/
H A Dtegra20-car.h129 #define TEGRA20_CLK_SCLK 107 macro
/linux-4.1.27/drivers/clk/tegra/
H A Dclk-tegra20.c448 { .con_id = "sclk", .dt_id = TEGRA20_CLK_SCLK },
730 clks[TEGRA20_CLK_SCLK] = clk; tegra20_super_clk_init()
1036 {TEGRA20_CLK_SCLK, TEGRA20_CLK_PLL_C_OUT1, 0, 1},

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