Searched refs:TEGRA20_CLK_PLL_C_OUT1 (Results 1 - 7 of 7) sorted by relevance
/linux-4.1.27/arch/mips/boot/dts/include/dt-bindings/clock/ |
H A D | tegra20-car.h | 137 #define TEGRA20_CLK_PLL_C_OUT1 115 macro
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/linux-4.1.27/arch/powerpc/boot/dts/include/dt-bindings/clock/ |
H A D | tegra20-car.h | 137 #define TEGRA20_CLK_PLL_C_OUT1 115 macro
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/linux-4.1.27/arch/arm64/boot/dts/include/dt-bindings/clock/ |
H A D | tegra20-car.h | 137 #define TEGRA20_CLK_PLL_C_OUT1 115 macro
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/linux-4.1.27/arch/metag/boot/dts/include/dt-bindings/clock/ |
H A D | tegra20-car.h | 137 #define TEGRA20_CLK_PLL_C_OUT1 115 macro
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/linux-4.1.27/arch/arm/boot/dts/include/dt-bindings/clock/ |
H A D | tegra20-car.h | 137 #define TEGRA20_CLK_PLL_C_OUT1 115 macro
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/linux-4.1.27/include/dt-bindings/clock/ |
H A D | tegra20-car.h | 137 #define TEGRA20_CLK_PLL_C_OUT1 115 macro
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/linux-4.1.27/drivers/clk/tegra/ |
H A D | clk-tegra20.c | 432 { .con_id = "pll_c_out1", .dt_id = TEGRA20_CLK_PLL_C_OUT1 }, 652 clks[TEGRA20_CLK_PLL_C_OUT1] = clk; tegra20_pll_init() 1035 {TEGRA20_CLK_PLL_C_OUT1, TEGRA20_CLK_CLK_MAX, 120000000, 1}, 1036 {TEGRA20_CLK_SCLK, TEGRA20_CLK_PLL_C_OUT1, 0, 1},
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