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Searched refs:SYSC_REG_CLKCFG0 (Results 1 – 2 of 2) sorted by relevance

/linux-4.1.27/arch/mips/include/asm/mach-ralink/
Dmt7620.h30 #define SYSC_REG_CLKCFG0 0x2c macro
/linux-4.1.27/arch/mips/ralink/
Dmt7620.c261 reg = rt_sysc_r32(SYSC_REG_CLKCFG0); in mt7620_get_periph_rate()