Searched refs:SSPP_VIG0 (Results 1 – 6 of 6) sorted by relevance
| /linux-4.1.27/drivers/gpu/drm/msm/mdp/mdp5/ |
| D | mdp5_cfg.c | 35 [SSPP_VIG0] = 1, [SSPP_VIG1] = 4, [SSPP_VIG2] = 7,
96 [SSPP_VIG0] = 1, [SSPP_VIG1] = 4,
165 [SSPP_VIG0] = 1, [SSPP_DMA0] = 4,
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| D | mdp5_ctl.h | 54 case SSPP_VIG0: return MDP5_CTL_LAYER_REG_VIG0(stage); in mdp_ctl_blend_mask()
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| D | mdp5_kms.h | 208 case SSPP_VIG0: in pipe_supports_yuv()
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| D | mdp5_ctl.c | 343 case SSPP_VIG0: return MDP5_CTL_FLUSH_VIG0; in mdp_ctl_flush_mask_pipe()
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| D | mdp5_kms.c | 311 SSPP_VIG0, SSPP_VIG1, SSPP_VIG2, SSPP_VIG3, in modeset_init() enumerator
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| D | mdp5.xml.h | 59 SSPP_VIG0 = 0, enumerator
482 case SSPP_VIG0: return (mdp5_cfg->pipe_vig.base[0]); in __offset_PIPE()
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