Searched refs:SPRN_DCWR (Results 1 - 2 of 2) sorted by relevance

/linux-4.1.27/arch/powerpc/mm/
H A D40x_mmu.c82 mtspr(SPRN_DCWR, 0x00000000); /* All caching is write-back */ MMU_init_hw()
/linux-4.1.27/arch/powerpc/include/asm/
H A Dreg_booke.h170 #define SPRN_DCWR 0x3BA /* Data Cache Write-thru Register */ macro

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