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Searched refs:SPORT3_MTCS0 (Results 1 – 4 of 4) sorted by relevance

/linux-4.1.27/arch/blackfin/mach-bf538/include/mach/
DdefBF538.h777 #define SPORT3_MTCS0 0xFFC02640 /* SPORT3 Multi-Channel Transmit Select Register 0 */ macro
DcdefBF538.h376 #define bfin_read_SPORT3_MTCS0() bfin_read32(SPORT3_MTCS0)
377 #define bfin_write_SPORT3_MTCS0(val) bfin_write32(SPORT3_MTCS0, val)
/linux-4.1.27/arch/blackfin/mach-bf548/include/mach/
DdefBF54x_base.h1014 #define SPORT3_MTCS0 0xffc02640 /* SPORT3 Multi channel Transmit Select Regi… macro
DcdefBF54x_base.h1742 #define bfin_read_SPORT3_MTCS0() bfin_read32(SPORT3_MTCS0)
1743 #define bfin_write_SPORT3_MTCS0(val) bfin_write32(SPORT3_MTCS0, val)