Searched refs:SPORT0_MCMC2 (Results 1 - 14 of 14) sorted by relevance

/linux-4.1.27/arch/blackfin/mach-bf533/include/mach/
H A DcdefBF532.h596 #define bfin_read_SPORT0_MCMC2() bfin_read16(SPORT0_MCMC2)
597 #define bfin_write_SPORT0_MCMC2(val) bfin_write16(SPORT0_MCMC2,val)
H A DdefBF532.h135 #define SPORT0_MCMC2 0xFFC0083C /* SPORT0 Multi-Channel Configuration Register 2 */ macro
/linux-4.1.27/arch/blackfin/mach-bf548/include/mach/
H A DcdefBF547.h79 #define bfin_read_SPORT0_MCMC2() bfin_read16(SPORT0_MCMC2)
80 #define bfin_write_SPORT0_MCMC2(val) bfin_write16(SPORT0_MCMC2, val)
H A DdefBF547.h51 #define SPORT0_MCMC2 0xffc0083c /* SPORT0 Multi channel Configuration Register 2 */ macro
/linux-4.1.27/arch/blackfin/mach-bf518/include/mach/
H A DcdefBF512.h278 #define bfin_read_SPORT0_MCMC2() bfin_read16(SPORT0_MCMC2)
279 #define bfin_write_SPORT0_MCMC2(val) bfin_write16(SPORT0_MCMC2, val)
H A DdefBF512.h173 #define SPORT0_MCMC2 0xFFC0083C /* SPORT0 Multi-Channel Configuration Register 2 */ macro
/linux-4.1.27/arch/blackfin/mach-bf527/include/mach/
H A DcdefBF522.h295 #define bfin_read_SPORT0_MCMC2() bfin_read16(SPORT0_MCMC2)
296 #define bfin_write_SPORT0_MCMC2(val) bfin_write16(SPORT0_MCMC2, val)
H A DdefBF522.h170 #define SPORT0_MCMC2 0xFFC0083C /* SPORT0 Multi-Channel Configuration Register 2 */ macro
/linux-4.1.27/arch/blackfin/mach-bf561/include/mach/
H A DcdefBF561.h406 #define bfin_read_SPORT0_MCMC2() bfin_read16(SPORT0_MCMC2)
407 #define bfin_write_SPORT0_MCMC2(val) bfin_write16(SPORT0_MCMC2,val)
H A DdefBF561.h247 #define SPORT0_MCMC2 0xFFC0083C /* SPORT0 Multi-Channel Configuration Register 2 */ macro
/linux-4.1.27/arch/blackfin/mach-bf537/include/mach/
H A DcdefBF534.h260 #define bfin_read_SPORT0_MCMC2() bfin_read16(SPORT0_MCMC2)
261 #define bfin_write_SPORT0_MCMC2(val) bfin_write16(SPORT0_MCMC2,val)
H A DdefBF534.h149 #define SPORT0_MCMC2 0xFFC0083C /* SPORT0 Multi-Channel Configuration Register 2 */ macro
/linux-4.1.27/arch/blackfin/mach-bf538/include/mach/
H A DcdefBF538.h242 #define bfin_read_SPORT0_MCMC2() bfin_read16(SPORT0_MCMC2)
243 #define bfin_write_SPORT0_MCMC2(val) bfin_write16(SPORT0_MCMC2, val)
H A DdefBF538.h139 #define SPORT0_MCMC2 0xFFC0083C /* SPORT0 Multi-Channel Configuration Register 2 */ macro

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