Searched refs:SOR_PLL_0 (Results 1 – 2 of 2) sorted by relevance
| /linux-4.1.27/drivers/gpu/drm/tegra/ |
| D | sor.c | 584 value = tegra_sor_readl(sor, SOR_PLL_0); in tegra_sor_power_down()
587 tegra_sor_writel(sor, value, SOR_PLL_0); in tegra_sor_power_down()
710 DUMP_REG(SOR_PLL_0); in tegra_sor_show_regs()
1013 tegra_sor_writel(sor, value, SOR_PLL_0); in tegra_sor_encoder_mode_set()
1053 value = tegra_sor_readl(sor, SOR_PLL_0); in tegra_sor_encoder_mode_set()
1055 tegra_sor_writel(sor, value, SOR_PLL_0); in tegra_sor_encoder_mode_set()
1078 value = tegra_sor_readl(sor, SOR_PLL_0); in tegra_sor_encoder_mode_set()
1081 tegra_sor_writel(sor, value, SOR_PLL_0); in tegra_sor_encoder_mode_set()
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| D | sor.h | 78 #define SOR_PLL_0 0x17 macro
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