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Searched refs:SOR_DP_PADCTL_0 (Results 1 – 2 of 2) sorted by relevance

/linux-4.1.27/drivers/gpu/drm/tegra/
Dsor.c114 value = tegra_sor_readl(sor, SOR_DP_PADCTL_0); in tegra_sor_dp_train_fast()
118 tegra_sor_writel(sor, value, SOR_DP_PADCTL_0); in tegra_sor_dp_train_fast()
120 value = tegra_sor_readl(sor, SOR_DP_PADCTL_0); in tegra_sor_dp_train_fast()
123 tegra_sor_writel(sor, value, SOR_DP_PADCTL_0); in tegra_sor_dp_train_fast()
127 value = tegra_sor_readl(sor, SOR_DP_PADCTL_0); in tegra_sor_dp_train_fast()
130 tegra_sor_writel(sor, value, SOR_DP_PADCTL_0); in tegra_sor_dp_train_fast()
555 value = tegra_sor_readl(sor, SOR_DP_PADCTL_0); in tegra_sor_power_down()
558 tegra_sor_writel(sor, value, SOR_DP_PADCTL_0); in tegra_sor_power_down()
779 DUMP_REG(SOR_DP_PADCTL_0); in tegra_sor_show_regs()
1057 value = tegra_sor_readl(sor, SOR_DP_PADCTL_0); in tegra_sor_encoder_mode_set()
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Dsor.h218 #define SOR_DP_PADCTL_0 0x5c macro