Searched refs:SKL_DPLL0 (Results 1 – 4 of 4) sorted by relevance
1086 pipe_config->ddi_pll_sel = SKL_DPLL0; in skl_edp_set_pll_config()1090 ctrl1 = DPLL_CTRL1_OVERRIDE(SKL_DPLL0); in skl_edp_set_pll_config()1094 SKL_DPLL0); in skl_edp_set_pll_config()1098 SKL_DPLL0); in skl_edp_set_pll_config()1102 SKL_DPLL0); in skl_edp_set_pll_config()1106 SKL_DPLL0); in skl_edp_set_pll_config()1113 SKL_DPLL0); in skl_edp_set_pll_config()1117 SKL_DPLL0); in skl_edp_set_pll_config()
1545 WARN_ON(dpll != SKL_DPLL0); in intel_ddi_pre_enable()1707 DPLL_CRTL1_LINK_RATE_MASK(SKL_DPLL0)) >> 1; in skl_get_cdclk_freq()
335 #define SKL_DPLL0 0 macro
8494 case SKL_DPLL0: in skylake_get_ddi_pll()