Searched refs:SH_ICR (Results 1 – 1 of 1) sorted by relevance
64 #define SH_ICR 0x70 /* 64 bits */ macro345 edma_shadow0_write_array(ctlr, SH_ICR, lch >> 5, in setup_dma_interrupt()405 edma_shadow0_write_array(ctlr, SH_ICR, bank, in dma_irq_handler()