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Searched refs:SET_BIT (Results 1 – 13 of 13) sorted by relevance

/linux-4.1.27/drivers/video/fbdev/kyro/
DSTG4000VTG.c34 tmp |= SET_BIT(8); in DisableVGA()
43 tmp = (STG_READ_REG(DACSyncCtrl)) | SET_BIT(0) | SET_BIT(2); in StopVTG()
53 tmp = ((STG_READ_REG(DACSyncCtrl)) | SET_BIT(31)); in StartVTG()
157 tmp = STG_READ_REG(DACSyncCtrl) | SET_BIT(3) | SET_BIT(1); in SetupVTG()
DSTG4000Ramdac.c104 tmp &= ~SET_BIT(31); in InitialiseRamdac()
152 tmp = (STG_READ_REG(DACStreamCtrl)) & ~SET_BIT(0); in DisableRamdacOutput()
161 tmp = (STG_READ_REG(DACStreamCtrl)) | SET_BIT(0); in EnableRamdacOutput()
DSTG4000InitDevice.c299 tmp |= SET_BIT(14); in SetCoreClockPLL()
309 tmp |= SET_BIT(14); in SetCoreClockPLL()
317 tmp = ((STG_READ_REG(Thread0Enable)) | SET_BIT(0)); in SetCoreClockPLL()
321 tmp = ((STG_READ_REG(Thread1Enable)) | SET_BIT(0)); in SetCoreClockPLL()
DSTG4000OverlayDevice.c181 tmp |= SET_BIT(31); /* Overlay format to Planer */ in CreateOverlaySurface()
293 tmp |= SET_BIT(7); in EnableOverlayPlane()
298 tmp |= SET_BIT(1); /* video stream */ in EnableOverlayPlane()
DSTG4000Reg.h31 #define SET_BIT(n) (1<<(n)) macro
/linux-4.1.27/drivers/usb/storage/
Drealtek_cr.c128 #define SET_BIT(data, idx) ((data) |= 1 << (idx)) macro
579 SET_BIT(value, 2); in config_autodelink_after_power_on()
584 SET_BIT(value, 7); in config_autodelink_after_power_on()
597 SET_BIT(value, 2); in config_autodelink_after_power_on()
644 SET_BIT(value, 2); in config_autodelink_before_power_down()
660 SET_BIT(value, 0); in config_autodelink_before_power_down()
662 SET_BIT(value, 2); in config_autodelink_before_power_down()
676 SET_BIT(value, 0); in config_autodelink_before_power_down()
677 SET_BIT(value, 7); in config_autodelink_before_power_down()
681 SET_BIT(value, 2); in config_autodelink_before_power_down()
/linux-4.1.27/drivers/scsi/sym53c8xx_2/
Dsym_nvram.c248 #define SET_BIT 0 macro
261 case SET_BIT: in S24C16_set_bit()
285 S24C16_set_bit(np, 1, gpreg, SET_BIT); in S24C16_start()
297 S24C16_set_bit(np, 1, gpreg, SET_BIT); in S24C16_stop()
307 S24C16_set_bit(np, write_bit, gpreg, SET_BIT); in S24C16_do_bit()
501 #undef SET_BIT
/linux-4.1.27/drivers/net/ethernet/apm/xgene/
Dxgene_enet_main.h165 #define SET_BIT(field) \ macro
Dxgene_enet_main.c81 SET_BIT(COHERENT)); in xgene_enet_refill_bufpool()
221 SET_BIT(IC) | in xgene_enet_work_msg()
222 SET_BIT(TYPE_ETH_WORK_MESSAGE); in xgene_enet_work_msg()
249 SET_BIT(COHERENT)); in xgene_enet_setup_tx_desc()
/linux-4.1.27/drivers/crypto/qat/qat_common/
Dqat_hal.c196 #define SET_BIT(wrd, bit) (wrd | 1 << bit) macro
212 SET_BIT(csr, CE_INUSE_CONTEXTS_BITPOS) : in qat_hal_set_ae_ctx_mode()
227 SET_BIT(csr, CE_NN_MODE_BITPOS) : in qat_hal_set_ae_nn_mode()
247 SET_BIT(csr, CE_LMADDR_0_GLOBAL_BITPOS) : in qat_hal_set_ae_lm_mode()
252 SET_BIT(csr, CE_LMADDR_1_GLOBAL_BITPOS) : in qat_hal_set_ae_lm_mode()
/linux-4.1.27/drivers/staging/rts5208/
Drtsx_chip.h337 #define SET_BIT(data, idx) ((data) |= 1 << (idx)) macro
Drtsx_scsi.c432 SET_BIT(chip->lun_mc, lun); in test_unit_ready()
882 SET_BIT(chip->lun_mc, lun); in read_write()
1091 SET_BIT(chip->lun_mc, lun); in read_capacity()
Dsd.c4260 SET_BIT(chip->lun_mc, lun); in sd_pass_thru_mode()