Searched refs:SDC4_RESET (Results 1 - 21 of 21) sorted by relevance
| /linux-4.1.27/arch/mips/boot/dts/include/dt-bindings/reset/ |
| H A D | qcom,gcc-ipq806x.h | 75 #define SDC4_RESET 58 macro
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| H A D | qcom,gcc-msm8660.h | 83 #define SDC4_RESET 66 macro
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| H A D | qcom,gcc-msm8960.h | 78 #define SDC4_RESET 61 macro
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| /linux-4.1.27/arch/powerpc/boot/dts/include/dt-bindings/reset/ |
| H A D | qcom,gcc-ipq806x.h | 75 #define SDC4_RESET 58 macro
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| H A D | qcom,gcc-msm8660.h | 83 #define SDC4_RESET 66 macro
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| H A D | qcom,gcc-msm8960.h | 78 #define SDC4_RESET 61 macro
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| /linux-4.1.27/arch/arm64/boot/dts/include/dt-bindings/reset/ |
| H A D | qcom,gcc-ipq806x.h | 75 #define SDC4_RESET 58 macro
|
| H A D | qcom,gcc-msm8660.h | 83 #define SDC4_RESET 66 macro
|
| H A D | qcom,gcc-msm8960.h | 78 #define SDC4_RESET 61 macro
|
| /linux-4.1.27/arch/metag/boot/dts/include/dt-bindings/reset/ |
| H A D | qcom,gcc-ipq806x.h | 75 #define SDC4_RESET 58 macro
|
| H A D | qcom,gcc-msm8660.h | 83 #define SDC4_RESET 66 macro
|
| H A D | qcom,gcc-msm8960.h | 78 #define SDC4_RESET 61 macro
|
| /linux-4.1.27/arch/arm/boot/dts/include/dt-bindings/reset/ |
| H A D | qcom,gcc-ipq806x.h | 75 #define SDC4_RESET 58 macro
|
| H A D | qcom,gcc-msm8660.h | 83 #define SDC4_RESET 66 macro
|
| H A D | qcom,gcc-msm8960.h | 78 #define SDC4_RESET 61 macro
|
| /linux-4.1.27/include/dt-bindings/reset/ |
| H A D | qcom,gcc-ipq806x.h | 75 #define SDC4_RESET 58 macro
|
| H A D | qcom,gcc-msm8660.h | 83 #define SDC4_RESET 66 macro
|
| H A D | qcom,gcc-msm8960.h | 78 #define SDC4_RESET 61 macro
|
| /linux-4.1.27/drivers/clk/qcom/ |
| H A D | gcc-msm8960.c | 3221 [SDC4_RESET] = { 0x2890 },
3431 [SDC4_RESET] = { 0x2890 },
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| H A D | gcc-ipq806x.c | 2371 [SDC4_RESET] = { 0x2890, 0 },
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| H A D | gcc-msm8660.c | 2647 [SDC4_RESET] = { 0x2890 },
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