Searched refs:SDC2_RESET (Results 1 - 21 of 21) sorted by relevance
| /linux-4.1.27/arch/mips/boot/dts/include/dt-bindings/reset/ |
| H A D | qcom,gcc-ipq806x.h | 73 #define SDC2_RESET 56 macro
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| H A D | qcom,gcc-msm8660.h | 81 #define SDC2_RESET 64 macro
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| H A D | qcom,gcc-msm8960.h | 76 #define SDC2_RESET 59 macro
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| /linux-4.1.27/arch/powerpc/boot/dts/include/dt-bindings/reset/ |
| H A D | qcom,gcc-ipq806x.h | 73 #define SDC2_RESET 56 macro
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| H A D | qcom,gcc-msm8660.h | 81 #define SDC2_RESET 64 macro
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| H A D | qcom,gcc-msm8960.h | 76 #define SDC2_RESET 59 macro
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| /linux-4.1.27/arch/arm64/boot/dts/include/dt-bindings/reset/ |
| H A D | qcom,gcc-ipq806x.h | 73 #define SDC2_RESET 56 macro
|
| H A D | qcom,gcc-msm8660.h | 81 #define SDC2_RESET 64 macro
|
| H A D | qcom,gcc-msm8960.h | 76 #define SDC2_RESET 59 macro
|
| /linux-4.1.27/arch/metag/boot/dts/include/dt-bindings/reset/ |
| H A D | qcom,gcc-ipq806x.h | 73 #define SDC2_RESET 56 macro
|
| H A D | qcom,gcc-msm8660.h | 81 #define SDC2_RESET 64 macro
|
| H A D | qcom,gcc-msm8960.h | 76 #define SDC2_RESET 59 macro
|
| /linux-4.1.27/arch/arm/boot/dts/include/dt-bindings/reset/ |
| H A D | qcom,gcc-ipq806x.h | 73 #define SDC2_RESET 56 macro
|
| H A D | qcom,gcc-msm8660.h | 81 #define SDC2_RESET 64 macro
|
| H A D | qcom,gcc-msm8960.h | 76 #define SDC2_RESET 59 macro
|
| /linux-4.1.27/include/dt-bindings/reset/ |
| H A D | qcom,gcc-ipq806x.h | 73 #define SDC2_RESET 56 macro
|
| H A D | qcom,gcc-msm8660.h | 81 #define SDC2_RESET 64 macro
|
| H A D | qcom,gcc-msm8960.h | 76 #define SDC2_RESET 59 macro
|
| /linux-4.1.27/drivers/clk/qcom/ |
| H A D | gcc-msm8960.c | 3219 [SDC2_RESET] = { 0x2850 },
3429 [SDC2_RESET] = { 0x2850 },
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| H A D | gcc-ipq806x.c | 2369 [SDC2_RESET] = { 0x2850, 0 },
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| H A D | gcc-msm8660.c | 2645 [SDC2_RESET] = { 0x2850 },
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