Searched refs:SDC1_RESET (Results 1 – 21 of 21) sorted by relevance
| /linux-4.1.27/arch/powerpc/boot/dts/include/dt-bindings/reset/ |
| D | qcom,gcc-msm8960.h | 75 #define SDC1_RESET 58 macro
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| D | qcom,gcc-ipq806x.h | 72 #define SDC1_RESET 55 macro
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| D | qcom,gcc-msm8660.h | 80 #define SDC1_RESET 63 macro
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| /linux-4.1.27/arch/mips/boot/dts/include/dt-bindings/reset/ |
| D | qcom,gcc-ipq806x.h | 72 #define SDC1_RESET 55 macro
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| D | qcom,gcc-msm8660.h | 80 #define SDC1_RESET 63 macro
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| D | qcom,gcc-msm8960.h | 75 #define SDC1_RESET 58 macro
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| /linux-4.1.27/arch/arm/boot/dts/include/dt-bindings/reset/ |
| D | qcom,gcc-msm8960.h | 75 #define SDC1_RESET 58 macro
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| D | qcom,gcc-ipq806x.h | 72 #define SDC1_RESET 55 macro
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| D | qcom,gcc-msm8660.h | 80 #define SDC1_RESET 63 macro
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| /linux-4.1.27/arch/arm64/boot/dts/include/dt-bindings/reset/ |
| D | qcom,gcc-ipq806x.h | 72 #define SDC1_RESET 55 macro
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| D | qcom,gcc-msm8960.h | 75 #define SDC1_RESET 58 macro
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| D | qcom,gcc-msm8660.h | 80 #define SDC1_RESET 63 macro
|
| /linux-4.1.27/include/dt-bindings/reset/ |
| D | qcom,gcc-msm8960.h | 75 #define SDC1_RESET 58 macro
|
| D | qcom,gcc-ipq806x.h | 72 #define SDC1_RESET 55 macro
|
| D | qcom,gcc-msm8660.h | 80 #define SDC1_RESET 63 macro
|
| /linux-4.1.27/arch/metag/boot/dts/include/dt-bindings/reset/ |
| D | qcom,gcc-msm8660.h | 80 #define SDC1_RESET 63 macro
|
| D | qcom,gcc-ipq806x.h | 72 #define SDC1_RESET 55 macro
|
| D | qcom,gcc-msm8960.h | 75 #define SDC1_RESET 58 macro
|
| /linux-4.1.27/drivers/clk/qcom/ |
| D | gcc-msm8960.c | 3218 [SDC1_RESET] = { 0x2830 },
3428 [SDC1_RESET] = { 0x2830 },
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| D | gcc-ipq806x.c | 2368 [SDC1_RESET] = { 0x2830, 0 },
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| D | gcc-msm8660.c | 2644 [SDC1_RESET] = { 0x2830 },
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