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Searched refs:RREG32_MC (Results 1 – 7 of 7) sorted by relevance

/linux-4.1.27/drivers/gpu/drm/radeon/
Drs400.c67 tmp = RREG32_MC(RS480_GART_CACHE_CNTRL); in rs400_gart_tlb_flush()
112 tmp = RREG32_MC(RS690_AIC_CTRL_SCRATCH); in rs400_gart_enable()
176 tmp = RREG32_MC(RS480_MC_MISC_CNTL); in rs400_gart_enable()
180 tmp = RREG32_MC(RS480_MC_MISC_CNTL); in rs400_gart_enable()
198 tmp = RREG32_MC(RS690_AIC_CTRL_SCRATCH); in rs400_gart_disable()
316 tmp = RREG32_MC(RS690_AIC_CTRL_SCRATCH); in rs400_debugfs_gart_info()
319 tmp = RREG32_MC(RS690_MCCFG_AGP_BASE); in rs400_debugfs_gart_info()
321 tmp = RREG32_MC(RS690_MCCFG_AGP_BASE_2); in rs400_debugfs_gart_info()
323 tmp = RREG32_MC(RS690_MCCFG_AGP_LOCATION); in rs400_debugfs_gart_info()
325 tmp = RREG32_MC(RS690_MCCFG_FB_LOCATION); in rs400_debugfs_gart_info()
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Drs600.c516 tmp = RREG32_MC(R_000100_MC_PT0_CNTL); in rs600_gart_tlb_flush()
520 tmp = RREG32_MC(R_000100_MC_PT0_CNTL); in rs600_gart_tlb_flush()
524 tmp = RREG32_MC(R_000100_MC_PT0_CNTL); in rs600_gart_tlb_flush()
527 tmp = RREG32_MC(R_000100_MC_PT0_CNTL); in rs600_gart_tlb_flush()
599 tmp = RREG32_MC(R_000100_MC_PT0_CNTL); in rs600_gart_enable()
601 tmp = RREG32_MC(R_000009_MC_CNTL1); in rs600_gart_enable()
617 tmp = RREG32_MC(R_000009_MC_CNTL1); in rs600_gart_disable()
849 if (G_000000_MC_IDLE(RREG32_MC(R_000000_MC_STATUS))) in rs600_mc_wait_for_idle()
876 base = RREG32_MC(R_000004_MC_FB_LOCATION); in rs600_mc_init()
Dr520.c43 tmp = RREG32_MC(R520_MC_STATUS); in r520_mc_wait_for_idle()
100 tmp = RREG32_MC(R520_MC_CNTL0); in r520_vram_get_type()
Drs690.c42 tmp = RREG32_MC(R_000090_MC_SYSTEM_STATUS); in rs690_mc_wait_for_idle()
163 base = RREG32_MC(R_000100_MCCFG_FB_LOCATION); in rs690_mc_init()
179 h_addr = G_00005F_K8_ADDR_EXT(RREG32_MC(R_00005F_MC_MISC_UMA_CNTL)); in rs690_mc_init()
180 l_addr = RREG32_MC(R_00001E_K8_FB_LOCATION); in rs690_mc_init()
599 tmp = RREG32_MC(R_000104_MC_INIT_MISC_LAT_TIMER); in rs690_bandwidth_update()
Drv515.c137 tmp = RREG32_MC(MC_STATUS); in rv515_mc_wait_for_idle()
184 tmp = RREG32_MC(RV515_MC_CNTL) & MEM_NUM_CHANNELS_MASK; in rv515_vram_get_type()
1296 tmp = RREG32_MC(MC_MISC_LAT_TIMER); in rv515_bandwidth_update()
Dr600.c1429 h_addr = G_000012_K8_ADDR_EXT(RREG32_MC(R_000012_MC_MISC_UMA_CNTL)); in r600_mc_init()
1430 l_addr = RREG32_MC(R_000011_K8_FB_LOCATION); in r600_mc_init()
Dradeon.h2548 #define RREG32_MC(reg) rdev->mc_rreg(rdev, (reg)) macro