/linux-4.1.27/arch/cris/include/arch-v32/mach-a3/mach/hwregs/iop/ |
H A D | iop_version_defs.h | 33 #ifndef REG_WR_VECT 34 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
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H A D | iop_sap_in_defs.h | 33 #ifndef REG_WR_VECT 34 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
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H A D | iop_sap_out_defs.h | 33 #ifndef REG_WR_VECT 34 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
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H A D | iop_sw_spu_defs.h | 33 #ifndef REG_WR_VECT 34 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
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H A D | iop_sw_cfg_defs.h | 33 #ifndef REG_WR_VECT 34 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
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H A D | iop_sw_cpu_defs.h | 33 #ifndef REG_WR_VECT 34 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
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H A D | iop_sw_mpu_defs.h | 33 #ifndef REG_WR_VECT 34 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
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/linux-4.1.27/arch/cris/include/arch-v32/arch/hwregs/iop/ |
H A D | iop_version_defs.h | 36 #ifndef REG_WR_VECT 37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
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H A D | iop_fifo_in_extra_defs.h | 36 #ifndef REG_WR_VECT 37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
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H A D | iop_fifo_out_extra_defs.h | 36 #ifndef REG_WR_VECT 37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
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H A D | iop_scrc_in_defs.h | 36 #ifndef REG_WR_VECT 37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
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H A D | iop_scrc_out_defs.h | 36 #ifndef REG_WR_VECT 37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
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H A D | iop_trigger_grp_defs.h | 36 #ifndef REG_WR_VECT 37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
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H A D | iop_crc_par_defs.h | 36 #ifndef REG_WR_VECT 37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
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H A D | iop_fifo_in_defs.h | 36 #ifndef REG_WR_VECT 37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
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H A D | iop_mpu_defs.h | 36 #ifndef REG_WR_VECT 37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
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H A D | iop_sap_in_defs.h | 36 #ifndef REG_WR_VECT 37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
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H A D | iop_timer_grp_defs.h | 36 #ifndef REG_WR_VECT 37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
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H A D | iop_dmc_in_defs.h | 36 #ifndef REG_WR_VECT 37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
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H A D | iop_dmc_out_defs.h | 36 #ifndef REG_WR_VECT 37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
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H A D | iop_fifo_out_defs.h | 36 #ifndef REG_WR_VECT 37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
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H A D | iop_sap_out_defs.h | 36 #ifndef REG_WR_VECT 37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
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H A D | iop_spu_defs.h | 36 #ifndef REG_WR_VECT 37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
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H A D | iop_sw_spu_defs.h | 36 #ifndef REG_WR_VECT 37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
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H A D | iop_sw_cfg_defs.h | 36 #ifndef REG_WR_VECT 37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
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H A D | iop_sw_cpu_defs.h | 36 #ifndef REG_WR_VECT 37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
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H A D | iop_sw_mpu_defs.h | 36 #ifndef REG_WR_VECT 37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
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/linux-4.1.27/arch/cris/include/arch-v32/arch/hwregs/ |
H A D | irq_nmi_defs.h | 36 #ifndef REG_WR_VECT 37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
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H A D | strcop_defs.h | 36 #ifndef REG_WR_VECT 37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
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H A D | config_defs.h | 36 #ifndef REG_WR_VECT 37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
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H A D | rt_trace_defs.h | 36 #ifndef REG_WR_VECT 37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
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H A D | ata_defs.h | 36 #ifndef REG_WR_VECT 37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
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H A D | bif_slave_defs.h | 36 #ifndef REG_WR_VECT 37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
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H A D | marb_bp_defs.h | 36 #ifndef REG_WR_VECT 37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
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H A D | marb_defs.h | 36 #ifndef REG_WR_VECT 37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro 295 #ifndef REG_WR_VECT 296 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
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H A D | bif_core_defs.h | 36 #ifndef REG_WR_VECT 37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
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H A D | eth_defs.h | 36 #ifndef REG_WR_VECT 37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
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H A D | extmem_defs.h | 36 #ifndef REG_WR_VECT 37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
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H A D | ser_defs.h | 36 #ifndef REG_WR_VECT 37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
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H A D | sser_defs.h | 36 #ifndef REG_WR_VECT 37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
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H A D | bif_dma_defs.h | 36 #ifndef REG_WR_VECT 37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
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H A D | dma_defs.h | 36 #ifndef REG_WR_VECT 37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
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/linux-4.1.27/arch/cris/include/arch-v32/mach-a3/mach/hwregs/ |
H A D | strmux_defs.h | 33 #ifndef REG_WR_VECT 34 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
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H A D | clkgen_defs.h | 33 #ifndef REG_WR_VECT 34 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
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H A D | l2cache_defs.h | 33 #ifndef REG_WR_VECT 34 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
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H A D | marb_bar_defs.h | 33 #ifndef REG_WR_VECT 34 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro 317 #ifndef REG_WR_VECT 318 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
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H A D | marb_foo_defs.h | 33 #ifndef REG_WR_VECT 34 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro 443 #ifndef REG_WR_VECT 444 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
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H A D | ddr2_defs.h | 33 #ifndef REG_WR_VECT 34 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
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H A D | intr_vect_defs.h | 33 #ifndef REG_WR_VECT 34 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
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H A D | pinmux_defs.h | 33 #ifndef REG_WR_VECT 34 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
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H A D | pio_defs.h | 33 #ifndef REG_WR_VECT 34 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
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H A D | timer_defs.h | 33 #ifndef REG_WR_VECT 34 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
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H A D | gio_defs.h | 33 #ifndef REG_WR_VECT 34 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
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/linux-4.1.27/arch/cris/include/arch-v32/mach-fs/mach/hwregs/ |
H A D | config_defs.h | 36 #ifndef REG_WR_VECT 37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
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H A D | strmux_defs.h | 36 #ifndef REG_WR_VECT 37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
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H A D | bif_slave_defs.h | 36 #ifndef REG_WR_VECT 37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
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H A D | intr_vect_defs.h | 36 #ifndef REG_WR_VECT 37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
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H A D | marb_bp_defs.h | 36 #ifndef REG_WR_VECT 37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
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H A D | marb_defs.h | 36 #ifndef REG_WR_VECT 37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro 295 #ifndef REG_WR_VECT 296 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
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H A D | bif_core_defs.h | 36 #ifndef REG_WR_VECT 37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
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H A D | gio_defs.h | 36 #ifndef REG_WR_VECT 37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
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H A D | pinmux_defs.h | 36 #ifndef REG_WR_VECT 37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
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H A D | timer_defs.h | 36 #ifndef REG_WR_VECT 37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
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H A D | bif_dma_defs.h | 36 #ifndef REG_WR_VECT 37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
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/linux-4.1.27/arch/cris/arch-v32/drivers/ |
H A D | iop_fw_load.c | 152 REG_WR_VECT(iop_mpu, regi_iop_mpu, rw_r, 0, start_addr); iop_fw_load_mpu()
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/linux-4.1.27/arch/cris/arch-v32/kernel/ |
H A D | irq.c | 461 REG_WR_VECT(intr_vect, regi_irq, rw_mask, i, vect_mask); init_IRQ()
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