Searched refs:REG_WR_VECT (Results 1 - 66 of 66) sorted by relevance

/linux-4.1.27/arch/cris/include/arch-v32/mach-a3/mach/hwregs/iop/
H A Diop_version_defs.h33 #ifndef REG_WR_VECT
34 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
H A Diop_sap_in_defs.h33 #ifndef REG_WR_VECT
34 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
H A Diop_sap_out_defs.h33 #ifndef REG_WR_VECT
34 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
H A Diop_sw_spu_defs.h33 #ifndef REG_WR_VECT
34 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
H A Diop_sw_cfg_defs.h33 #ifndef REG_WR_VECT
34 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
H A Diop_sw_cpu_defs.h33 #ifndef REG_WR_VECT
34 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
H A Diop_sw_mpu_defs.h33 #ifndef REG_WR_VECT
34 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
/linux-4.1.27/arch/cris/include/arch-v32/arch/hwregs/iop/
H A Diop_version_defs.h36 #ifndef REG_WR_VECT
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
H A Diop_fifo_in_extra_defs.h36 #ifndef REG_WR_VECT
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
H A Diop_fifo_out_extra_defs.h36 #ifndef REG_WR_VECT
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
H A Diop_scrc_in_defs.h36 #ifndef REG_WR_VECT
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
H A Diop_scrc_out_defs.h36 #ifndef REG_WR_VECT
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
H A Diop_trigger_grp_defs.h36 #ifndef REG_WR_VECT
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
H A Diop_crc_par_defs.h36 #ifndef REG_WR_VECT
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
H A Diop_fifo_in_defs.h36 #ifndef REG_WR_VECT
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
H A Diop_mpu_defs.h36 #ifndef REG_WR_VECT
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
H A Diop_sap_in_defs.h36 #ifndef REG_WR_VECT
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
H A Diop_timer_grp_defs.h36 #ifndef REG_WR_VECT
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
H A Diop_dmc_in_defs.h36 #ifndef REG_WR_VECT
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
H A Diop_dmc_out_defs.h36 #ifndef REG_WR_VECT
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
H A Diop_fifo_out_defs.h36 #ifndef REG_WR_VECT
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
H A Diop_sap_out_defs.h36 #ifndef REG_WR_VECT
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
H A Diop_spu_defs.h36 #ifndef REG_WR_VECT
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
H A Diop_sw_spu_defs.h36 #ifndef REG_WR_VECT
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
H A Diop_sw_cfg_defs.h36 #ifndef REG_WR_VECT
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
H A Diop_sw_cpu_defs.h36 #ifndef REG_WR_VECT
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
H A Diop_sw_mpu_defs.h36 #ifndef REG_WR_VECT
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
/linux-4.1.27/arch/cris/include/arch-v32/arch/hwregs/
H A Dirq_nmi_defs.h36 #ifndef REG_WR_VECT
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
H A Dstrcop_defs.h36 #ifndef REG_WR_VECT
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
H A Dconfig_defs.h36 #ifndef REG_WR_VECT
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
H A Drt_trace_defs.h36 #ifndef REG_WR_VECT
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
H A Data_defs.h36 #ifndef REG_WR_VECT
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
H A Dbif_slave_defs.h36 #ifndef REG_WR_VECT
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
H A Dmarb_bp_defs.h36 #ifndef REG_WR_VECT
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
H A Dmarb_defs.h36 #ifndef REG_WR_VECT
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
295 #ifndef REG_WR_VECT
296 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
H A Dbif_core_defs.h36 #ifndef REG_WR_VECT
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
H A Deth_defs.h36 #ifndef REG_WR_VECT
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
H A Dextmem_defs.h36 #ifndef REG_WR_VECT
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
H A Dser_defs.h36 #ifndef REG_WR_VECT
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
H A Dsser_defs.h36 #ifndef REG_WR_VECT
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
H A Dbif_dma_defs.h36 #ifndef REG_WR_VECT
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
H A Ddma_defs.h36 #ifndef REG_WR_VECT
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
/linux-4.1.27/arch/cris/include/arch-v32/mach-a3/mach/hwregs/
H A Dstrmux_defs.h33 #ifndef REG_WR_VECT
34 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
H A Dclkgen_defs.h33 #ifndef REG_WR_VECT
34 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
H A Dl2cache_defs.h33 #ifndef REG_WR_VECT
34 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
H A Dmarb_bar_defs.h33 #ifndef REG_WR_VECT
34 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
317 #ifndef REG_WR_VECT
318 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
H A Dmarb_foo_defs.h33 #ifndef REG_WR_VECT
34 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
443 #ifndef REG_WR_VECT
444 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
H A Dddr2_defs.h33 #ifndef REG_WR_VECT
34 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
H A Dintr_vect_defs.h33 #ifndef REG_WR_VECT
34 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
H A Dpinmux_defs.h33 #ifndef REG_WR_VECT
34 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
H A Dpio_defs.h33 #ifndef REG_WR_VECT
34 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
H A Dtimer_defs.h33 #ifndef REG_WR_VECT
34 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
H A Dgio_defs.h33 #ifndef REG_WR_VECT
34 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
/linux-4.1.27/arch/cris/include/arch-v32/mach-fs/mach/hwregs/
H A Dconfig_defs.h36 #ifndef REG_WR_VECT
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
H A Dstrmux_defs.h36 #ifndef REG_WR_VECT
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
H A Dbif_slave_defs.h36 #ifndef REG_WR_VECT
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
H A Dintr_vect_defs.h36 #ifndef REG_WR_VECT
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
H A Dmarb_bp_defs.h36 #ifndef REG_WR_VECT
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
H A Dmarb_defs.h36 #ifndef REG_WR_VECT
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
295 #ifndef REG_WR_VECT
296 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
H A Dbif_core_defs.h36 #ifndef REG_WR_VECT
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
H A Dgio_defs.h36 #ifndef REG_WR_VECT
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
H A Dpinmux_defs.h36 #ifndef REG_WR_VECT
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
H A Dtimer_defs.h36 #ifndef REG_WR_VECT
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
H A Dbif_dma_defs.h36 #ifndef REG_WR_VECT
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
/linux-4.1.27/arch/cris/arch-v32/drivers/
H A Diop_fw_load.c152 REG_WR_VECT(iop_mpu, regi_iop_mpu, rw_r, 0, start_addr); iop_fw_load_mpu()
/linux-4.1.27/arch/cris/arch-v32/kernel/
H A Dirq.c461 REG_WR_VECT(intr_vect, regi_irq, rw_mask, i, vect_mask); init_IRQ()

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