Home
last modified time | relevance | path

Searched refs:REG_WR_VECT (Results 1 – 66 of 66) sorted by relevance

/linux-4.1.27/arch/cris/include/arch-v32/arch/hwregs/
Dmarb_defs.h36 #ifndef REG_WR_VECT
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
295 #ifndef REG_WR_VECT
296 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
Dstrcop_defs.h36 #ifndef REG_WR_VECT
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
Dirq_nmi_defs.h36 #ifndef REG_WR_VECT
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
Dconfig_defs.h36 #ifndef REG_WR_VECT
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
Drt_trace_defs.h36 #ifndef REG_WR_VECT
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
Dmarb_bp_defs.h36 #ifndef REG_WR_VECT
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
Data_defs.h36 #ifndef REG_WR_VECT
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
Dbif_slave_defs.h36 #ifndef REG_WR_VECT
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
Dbif_core_defs.h36 #ifndef REG_WR_VECT
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
Dser_defs.h36 #ifndef REG_WR_VECT
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
Deth_defs.h36 #ifndef REG_WR_VECT
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
Dsser_defs.h36 #ifndef REG_WR_VECT
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
Ddma_defs.h36 #ifndef REG_WR_VECT
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
Dextmem_defs.h36 #ifndef REG_WR_VECT
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
Dbif_dma_defs.h36 #ifndef REG_WR_VECT
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
/linux-4.1.27/arch/cris/include/arch-v32/mach-a3/mach/hwregs/
Dmarb_bar_defs.h33 #ifndef REG_WR_VECT
34 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
317 #ifndef REG_WR_VECT
318 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
Dstrmux_defs.h33 #ifndef REG_WR_VECT
34 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
Dl2cache_defs.h33 #ifndef REG_WR_VECT
34 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
Dclkgen_defs.h33 #ifndef REG_WR_VECT
34 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
Dmarb_foo_defs.h33 #ifndef REG_WR_VECT
34 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
443 #ifndef REG_WR_VECT
444 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
Dtimer_defs.h33 #ifndef REG_WR_VECT
34 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
Dddr2_defs.h33 #ifndef REG_WR_VECT
34 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
Dpinmux_defs.h33 #ifndef REG_WR_VECT
34 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
Dpio_defs.h33 #ifndef REG_WR_VECT
34 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
Dintr_vect_defs.h33 #ifndef REG_WR_VECT
34 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
Dgio_defs.h33 #ifndef REG_WR_VECT
34 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
/linux-4.1.27/arch/cris/include/arch-v32/mach-fs/mach/hwregs/
Dmarb_defs.h36 #ifndef REG_WR_VECT
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
295 #ifndef REG_WR_VECT
296 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
Dstrmux_defs.h36 #ifndef REG_WR_VECT
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
Dconfig_defs.h36 #ifndef REG_WR_VECT
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
Dmarb_bp_defs.h36 #ifndef REG_WR_VECT
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
Dtimer_defs.h36 #ifndef REG_WR_VECT
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
Dbif_slave_defs.h36 #ifndef REG_WR_VECT
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
Dintr_vect_defs.h36 #ifndef REG_WR_VECT
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
Dgio_defs.h36 #ifndef REG_WR_VECT
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
Dbif_core_defs.h36 #ifndef REG_WR_VECT
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
Dpinmux_defs.h36 #ifndef REG_WR_VECT
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
Dbif_dma_defs.h36 #ifndef REG_WR_VECT
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
/linux-4.1.27/arch/cris/include/arch-v32/mach-a3/mach/hwregs/iop/
Diop_version_defs.h33 #ifndef REG_WR_VECT
34 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
Diop_sap_in_defs.h33 #ifndef REG_WR_VECT
34 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
Diop_sap_out_defs.h33 #ifndef REG_WR_VECT
34 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
Diop_sw_spu_defs.h33 #ifndef REG_WR_VECT
34 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
Diop_sw_cpu_defs.h33 #ifndef REG_WR_VECT
34 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
Diop_sw_mpu_defs.h33 #ifndef REG_WR_VECT
34 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
Diop_sw_cfg_defs.h33 #ifndef REG_WR_VECT
34 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
/linux-4.1.27/arch/cris/include/arch-v32/arch/hwregs/iop/
Diop_version_defs.h36 #ifndef REG_WR_VECT
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
Diop_scrc_out_defs.h36 #ifndef REG_WR_VECT
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
Diop_scrc_in_defs.h36 #ifndef REG_WR_VECT
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
Diop_fifo_in_extra_defs.h36 #ifndef REG_WR_VECT
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
Diop_fifo_out_extra_defs.h36 #ifndef REG_WR_VECT
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
Diop_trigger_grp_defs.h36 #ifndef REG_WR_VECT
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
Diop_mpu_defs.h36 #ifndef REG_WR_VECT
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
Diop_sap_in_defs.h36 #ifndef REG_WR_VECT
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
Diop_crc_par_defs.h36 #ifndef REG_WR_VECT
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
Diop_fifo_in_defs.h36 #ifndef REG_WR_VECT
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
Diop_timer_grp_defs.h36 #ifndef REG_WR_VECT
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
Diop_fifo_out_defs.h36 #ifndef REG_WR_VECT
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
Diop_dmc_out_defs.h36 #ifndef REG_WR_VECT
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
Diop_sap_out_defs.h36 #ifndef REG_WR_VECT
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
Diop_dmc_in_defs.h36 #ifndef REG_WR_VECT
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
Diop_spu_defs.h36 #ifndef REG_WR_VECT
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
Diop_sw_spu_defs.h36 #ifndef REG_WR_VECT
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
Diop_sw_cpu_defs.h36 #ifndef REG_WR_VECT
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
Diop_sw_mpu_defs.h36 #ifndef REG_WR_VECT
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
Diop_sw_cfg_defs.h36 #ifndef REG_WR_VECT
37 #define REG_WR_VECT( scope, inst, reg, index, val ) \ macro
/linux-4.1.27/arch/cris/arch-v32/drivers/
Diop_fw_load.c152 REG_WR_VECT(iop_mpu, regi_iop_mpu, rw_r, 0, start_addr); in iop_fw_load_mpu()
/linux-4.1.27/arch/cris/arch-v32/kernel/
Dirq.c461 REG_WR_VECT(intr_vect, regi_irq, rw_mask, i, vect_mask); in init_IRQ()