| /linux-4.1.27/arch/cris/include/arch-v32/mach-a3/mach/hwregs/iop/ |
| H A D | iop_version_defs.h | 56 #ifndef REG_WR_INT_VECT
57 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ macro
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| H A D | iop_sap_in_defs.h | 56 #ifndef REG_WR_INT_VECT
57 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ macro
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| H A D | iop_sap_out_defs.h | 56 #ifndef REG_WR_INT_VECT
57 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ macro
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| H A D | iop_sw_spu_defs.h | 56 #ifndef REG_WR_INT_VECT
57 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ macro
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| H A D | iop_sw_cfg_defs.h | 56 #ifndef REG_WR_INT_VECT
57 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ macro
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| H A D | iop_sw_cpu_defs.h | 56 #ifndef REG_WR_INT_VECT
57 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ macro
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| H A D | iop_sw_mpu_defs.h | 56 #ifndef REG_WR_INT_VECT
57 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ macro
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| /linux-4.1.27/arch/cris/include/arch-v32/arch/hwregs/iop/ |
| H A D | iop_version_defs.h | 59 #ifndef REG_WR_INT_VECT
60 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ macro
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| H A D | iop_fifo_in_extra_defs.h | 59 #ifndef REG_WR_INT_VECT
60 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ macro
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| H A D | iop_fifo_out_extra_defs.h | 59 #ifndef REG_WR_INT_VECT
60 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ macro
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| H A D | iop_scrc_in_defs.h | 59 #ifndef REG_WR_INT_VECT
60 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ macro
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| H A D | iop_scrc_out_defs.h | 59 #ifndef REG_WR_INT_VECT
60 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ macro
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| H A D | iop_trigger_grp_defs.h | 59 #ifndef REG_WR_INT_VECT
60 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ macro
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| H A D | iop_crc_par_defs.h | 59 #ifndef REG_WR_INT_VECT
60 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ macro
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| H A D | iop_fifo_in_defs.h | 59 #ifndef REG_WR_INT_VECT
60 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ macro
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| H A D | iop_mpu_defs.h | 59 #ifndef REG_WR_INT_VECT
60 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ macro
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| H A D | iop_sap_in_defs.h | 59 #ifndef REG_WR_INT_VECT
60 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ macro
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| H A D | iop_timer_grp_defs.h | 59 #ifndef REG_WR_INT_VECT
60 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ macro
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| H A D | iop_dmc_in_defs.h | 59 #ifndef REG_WR_INT_VECT
60 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ macro
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| H A D | iop_dmc_out_defs.h | 59 #ifndef REG_WR_INT_VECT
60 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ macro
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| H A D | iop_fifo_out_defs.h | 59 #ifndef REG_WR_INT_VECT
60 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ macro
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| H A D | iop_sap_out_defs.h | 59 #ifndef REG_WR_INT_VECT
60 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ macro
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| H A D | iop_spu_defs.h | 59 #ifndef REG_WR_INT_VECT
60 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ macro
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| H A D | iop_sw_spu_defs.h | 59 #ifndef REG_WR_INT_VECT
60 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ macro
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| H A D | iop_sw_cfg_defs.h | 59 #ifndef REG_WR_INT_VECT
60 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ macro
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| H A D | iop_sw_cpu_defs.h | 59 #ifndef REG_WR_INT_VECT
60 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ macro
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| H A D | iop_sw_mpu_defs.h | 59 #ifndef REG_WR_INT_VECT
60 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ macro
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| /linux-4.1.27/arch/cris/include/arch-v32/arch/hwregs/ |
| H A D | irq_nmi_defs.h | 59 #ifndef REG_WR_INT_VECT
60 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ macro
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| H A D | strcop_defs.h | 59 #ifndef REG_WR_INT_VECT
60 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ macro
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| H A D | config_defs.h | 59 #ifndef REG_WR_INT_VECT
60 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ macro
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| H A D | rt_trace_defs.h | 59 #ifndef REG_WR_INT_VECT
60 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ macro
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| H A D | ata_defs.h | 59 #ifndef REG_WR_INT_VECT
60 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ macro
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| H A D | bif_slave_defs.h | 59 #ifndef REG_WR_INT_VECT
60 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ macro
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| H A D | marb_bp_defs.h | 59 #ifndef REG_WR_INT_VECT
60 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ macro
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| H A D | marb_defs.h | 59 #ifndef REG_WR_INT_VECT
60 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ macro
318 #ifndef REG_WR_INT_VECT
319 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ macro
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| H A D | bif_core_defs.h | 59 #ifndef REG_WR_INT_VECT
60 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ macro
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| H A D | eth_defs.h | 59 #ifndef REG_WR_INT_VECT
60 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ macro
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| H A D | extmem_defs.h | 59 #ifndef REG_WR_INT_VECT
60 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ macro
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| H A D | ser_defs.h | 59 #ifndef REG_WR_INT_VECT
60 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ macro
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| H A D | sser_defs.h | 59 #ifndef REG_WR_INT_VECT
60 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ macro
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| H A D | bif_dma_defs.h | 59 #ifndef REG_WR_INT_VECT
60 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ macro
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| H A D | dma_defs.h | 59 #ifndef REG_WR_INT_VECT
60 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ macro
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| /linux-4.1.27/arch/cris/include/arch-v32/mach-a3/mach/hwregs/ |
| H A D | strmux_defs.h | 56 #ifndef REG_WR_INT_VECT
57 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ macro
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| H A D | clkgen_defs.h | 56 #ifndef REG_WR_INT_VECT
57 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ macro
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| H A D | l2cache_defs.h | 56 #ifndef REG_WR_INT_VECT
57 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ macro
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| H A D | marb_bar_defs.h | 56 #ifndef REG_WR_INT_VECT
57 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ macro
340 #ifndef REG_WR_INT_VECT
341 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ macro
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| H A D | marb_foo_defs.h | 56 #ifndef REG_WR_INT_VECT
57 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ macro
466 #ifndef REG_WR_INT_VECT
467 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ macro
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| H A D | ddr2_defs.h | 56 #ifndef REG_WR_INT_VECT
57 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ macro
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| H A D | intr_vect_defs.h | 56 #ifndef REG_WR_INT_VECT
57 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ macro
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| H A D | pinmux_defs.h | 56 #ifndef REG_WR_INT_VECT
57 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ macro
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| H A D | pio_defs.h | 56 #ifndef REG_WR_INT_VECT
57 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ macro
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| H A D | timer_defs.h | 56 #ifndef REG_WR_INT_VECT
57 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ macro
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| H A D | gio_defs.h | 56 #ifndef REG_WR_INT_VECT
57 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ macro
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| /linux-4.1.27/arch/cris/arch-v32/kernel/ |
| H A D | irq.c | 214 REG_WR_INT_VECT(intr_vect, irq_regs[cpu], rw_mask, block_irq()
220 REG_WR_INT_VECT(intr_vect, irq_regs[cpu], rw_mask, block_irq()
238 REG_WR_INT_VECT(intr_vect, irq_regs[cpu], rw_mask, unblock_irq()
244 REG_WR_INT_VECT(intr_vect, irq_regs[cpu], rw_mask, unblock_irq()
393 REG_WR_INT_VECT(intr_vect, irq_regs[cpu], rw_mask, i, mask); crisv32_do_multiple()
426 REG_WR_INT_VECT(intr_vect, irq_regs[cpu], rw_mask, i, mask); crisv32_do_multiple()
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| /linux-4.1.27/arch/cris/include/arch-v32/mach-fs/mach/hwregs/ |
| H A D | config_defs.h | 59 #ifndef REG_WR_INT_VECT
60 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ macro
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| H A D | strmux_defs.h | 59 #ifndef REG_WR_INT_VECT
60 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ macro
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| H A D | bif_slave_defs.h | 59 #ifndef REG_WR_INT_VECT
60 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ macro
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| H A D | intr_vect_defs.h | 59 #ifndef REG_WR_INT_VECT
60 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ macro
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| H A D | marb_bp_defs.h | 59 #ifndef REG_WR_INT_VECT
60 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ macro
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| H A D | marb_defs.h | 59 #ifndef REG_WR_INT_VECT
60 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ macro
318 #ifndef REG_WR_INT_VECT
319 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ macro
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| H A D | bif_core_defs.h | 59 #ifndef REG_WR_INT_VECT
60 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ macro
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| H A D | gio_defs.h | 59 #ifndef REG_WR_INT_VECT
60 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ macro
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| H A D | pinmux_defs.h | 59 #ifndef REG_WR_INT_VECT
60 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ macro
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| H A D | timer_defs.h | 59 #ifndef REG_WR_INT_VECT
60 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ macro
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| H A D | bif_dma_defs.h | 59 #ifndef REG_WR_INT_VECT
60 #define REG_WR_INT_VECT( scope, inst, reg, index, val ) \ macro
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| /linux-4.1.27/arch/cris/arch-v32/mach-a3/ |
| H A D | arbiter.c | 218 REG_WR_INT_VECT(marb_foo, regi_marb_foo, crisv32_arbiter_config()
221 REG_WR_INT_VECT(marb_foo, regi_marb_foo, crisv32_arbiter_config()
224 REG_WR_INT_VECT(marb_bar, regi_marb_bar, crisv32_arbiter_config()
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| /linux-4.1.27/arch/cris/arch-v32/mach-fs/ |
| H A D | arbiter.c | 153 REG_WR_INT_VECT(marb, regi_marb, rw_ext_slots, slot, crisv32_arbiter_config()
156 REG_WR_INT_VECT(marb, regi_marb, rw_int_slots, slot, crisv32_arbiter_config()
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