Searched refs:REG_A4XX_RBBM_INT_0_MASK (Results 1 – 2 of 2) sorted by relevance
239 gpu_write(gpu, REG_A4XX_RBBM_INT_0_MASK, A4XX_INT0_MASK); in a4xx_hw_init()467 REG_ADRENO_DEFINE(REG_ADRENO_RBBM_INT_0_MASK, REG_A4XX_RBBM_INT_0_MASK),
784 #define REG_A4XX_RBBM_INT_0_MASK 0x00000037 macro