Searched refs:PXA168_CLK_PWM0 (Results 1 - 7 of 7) sorted by relevance
| /linux-4.1.27/arch/mips/boot/dts/include/dt-bindings/clock/ |
| H A D | marvell,pxa168.h | 31 #define PXA168_CLK_PWM0 67 macro
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| /linux-4.1.27/arch/powerpc/boot/dts/include/dt-bindings/clock/ |
| H A D | marvell,pxa168.h | 31 #define PXA168_CLK_PWM0 67 macro
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| /linux-4.1.27/arch/arm64/boot/dts/include/dt-bindings/clock/ |
| H A D | marvell,pxa168.h | 31 #define PXA168_CLK_PWM0 67 macro
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| /linux-4.1.27/arch/metag/boot/dts/include/dt-bindings/clock/ |
| H A D | marvell,pxa168.h | 31 #define PXA168_CLK_PWM0 67 macro
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| /linux-4.1.27/arch/arm/boot/dts/include/dt-bindings/clock/ |
| H A D | marvell,pxa168.h | 31 #define PXA168_CLK_PWM0 67 macro
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| /linux-4.1.27/include/dt-bindings/clock/ |
| H A D | marvell,pxa168.h | 31 #define PXA168_CLK_PWM0 67 macro
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| /linux-4.1.27/drivers/clk/mmp/ |
| H A D | clk-of-pxa168.c | 141 {PXA168_CLK_PWM0, "pwm0_clk", "pll1_48", CLK_SET_RATE_PARENT, APBC_PWM0, 0x3, 0x3, 0x0, 0, &reset_lock},
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