Searched refs:PXA168_CLK_CCIC0_PHY (Results 1 - 7 of 7) sorted by relevance
| /linux-4.1.27/arch/mips/boot/dts/include/dt-bindings/clock/ |
| H A D | marvell,pxa168.h | 53 #define PXA168_CLK_CCIC0_PHY 108 macro
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| /linux-4.1.27/arch/powerpc/boot/dts/include/dt-bindings/clock/ |
| H A D | marvell,pxa168.h | 53 #define PXA168_CLK_CCIC0_PHY 108 macro
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| /linux-4.1.27/arch/arm64/boot/dts/include/dt-bindings/clock/ |
| H A D | marvell,pxa168.h | 53 #define PXA168_CLK_CCIC0_PHY 108 macro
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| /linux-4.1.27/arch/metag/boot/dts/include/dt-bindings/clock/ |
| H A D | marvell,pxa168.h | 53 #define PXA168_CLK_CCIC0_PHY 108 macro
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| /linux-4.1.27/arch/arm/boot/dts/include/dt-bindings/clock/ |
| H A D | marvell,pxa168.h | 53 #define PXA168_CLK_CCIC0_PHY 108 macro
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| /linux-4.1.27/include/dt-bindings/clock/ |
| H A D | marvell,pxa168.h | 53 #define PXA168_CLK_CCIC0_PHY 108 macro
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| /linux-4.1.27/drivers/clk/mmp/ |
| H A D | clk-of-pxa168.c | 202 {PXA168_CLK_CCIC0_PHY, "ccic0_phy_clk", "ccic0_phy_mux", CLK_SET_RATE_PARENT, APMU_CCIC0, 0x24, 0x24, 0x0, 0, &ccic0_lock},
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