Searched refs:PU (Results 1 – 10 of 10) sorted by relevance
16 #define PU (1 << 26) macro32 #define IN_PU (PU)38 #define BIDIR_PU (OE | PU | OD)
36 /* ARM kHz SOC-PU uV */
38 /* ARM kHz SOC-PU uV */
52 /* ARM kHz SOC-PU uV */
5 counters and Power Gating Control (PGC) for the CPU and PU (GPU/VPU) power13 - pu-supply: Link to the LDO regulator powering the PU power domain14 - clocks: Clock phandles to devices in the PU power domain that need46 Example of a device that is part of the PU power domain:
9 Pull Up (PU) are driven by the related PIO block.
146 #define ST_PINCONF_UNPACK_PU(conf) ST_PINCONF_UNPACK(conf, PU)147 #define ST_PINCONF_PACK_PU(conf) ST_PINCONF_PACK(conf, 1, PU)
160 | RESERVED |PS|PU|PD| DRIVE |SS|SD|SO|EC|EF|ER|--| AF_SEL |
1486 55..33.. PPUURRGGEEUUSSEERR1555 55..77.. PPUURRGGEEFFIIDD
33 and DAC960PJ/PG/PU/PD/PL. See below for a complete controller list as well as