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Searched refs:PSW (Results 1 – 21 of 21) sorted by relevance

/linux-4.1.27/arch/sh/boards/mach-highlander/
Dirq-r7780rp.c23 PSW, /* Push Switch */ enumerator
38 INTC_IRQ(PSW, IRQ_PSW),
45 0, 0, 0, 0, 0, 0, PSW, AX88796 } },
Dirq-r7780mp.c28 PSW, /* Push Switch */ enumerator
42 INTC_IRQ(PSW, IRQ_PSW),
52 0, EXT6, EXT5, EXT4, EXT2, EXT1, PSW, AX88796 } },
/linux-4.1.27/arch/s390/kernel/
Dbase.S90 larl %r4,.Lcontinue_psw # Save PSW flags
93 larl %r4,.Lrestart_psw # Setup restart PSW at absolute 0
95 lg %r4,0(%r4) # Save PSW
109 larl %r4,.Lcontinue_psw # Restore PSW flags
Dsclp.S88 .long 0, 0, 0, 0 # old ext int PSW
90 .long 0x00080000, 0x80000000+.LwaitS1 # PSW to handle ext int
92 .quad 0, .LwaitS1 # PSW to handle ext int, 64 bit
94 .long 0x010a0000, 0x00000000+.LloopS1 # PSW to wait for ext int
Dhead.S38 .long 0x02000068,0x60000050 # (a PSW and two CCWs).
48 .long 0x02000370,0x60000050 # the channel program the PSW
Dentry.S753 mvc __LC_RETURN_MCCK_PSW(16),__PT_PSW(%r11) # move return PSW
771 # PSW restart interrupt handler
1017 # will rewind the PSW by the ILC, which is 4 bytes in case of SIE. Other
/linux-4.1.27/arch/m32r/kernel/
Dentry.S103 #define PSW(reg) @(0x4C,reg) macro
156 ld r4, PSW(sp)
Dhead.S187 ;; clear PSW
/linux-4.1.27/Documentation/parisc/
Dregisters22 CR22 Interrupt PSW
75 PSW default W value 0
76 PSW default E value 0
Ddebugging31 Certain, very critical code has to clear the Q bit in the PSW. What
/linux-4.1.27/arch/m32r/platforms/oaks32r/
Ddot.gdbinit.nommu82 printf "PSW[0x%08lX] CBR[0x%08lX] SPI[0x%08lX] SPU[0x%08lX]\n",$psw,$cbr,$spi,$spu
/linux-4.1.27/arch/m32r/platforms/mappi3/
Ddot.gdbinit140 printf "PSW[0x%08lX] CBR[0x%08lX] SPI[0x%08lX] SPU[0x%08lX]\n",$psw,$cbr,$spi,$spu
/linux-4.1.27/arch/m32r/platforms/mappi2/
Ddot.gdbinit.vdec2151 printf "PSW[0x%08lX] CBR[0x%08lX] SPI[0x%08lX] SPU[0x%08lX]\n",$psw,$cbr,$spi,$spu
/linux-4.1.27/Documentation/s390/
DDebugging390.txt70 The PSW is the most important register on the machine it
97 8-11 8-11 PSW Key used for complex memory protection mechanism
153 PSW 31 PSW 32
263 This also means that we need to look at the PSW problem state bit and the
759 address translation in the PSW. For kernel hacking you will reap dividends if
863 D PSW will display the current PSW
864 st PSW 2000 will put the value 2000 into the PSW &
871 To display memory mapped using the current PSW's mapping try
881 modify the PSW to the other addressing mode, display the stuff & then
2012 User PSW: 070de000 80414146
/linux-4.1.27/arch/m32r/platforms/m32700ut/
Ddot.gdbinit_200MHz_16MB152 printf "PSW[0x%08lX] CBR[0x%08lX] SPI[0x%08lX] SPU[0x%08lX]\n",$psw,$cbr,$spi,$spu
Ddot.gdbinit_400MHz_32MB152 printf "PSW[0x%08lX] CBR[0x%08lX] SPI[0x%08lX] SPU[0x%08lX]\n",$psw,$cbr,$spi,$spu
Ddot.gdbinit_300MHz_32MB152 printf "PSW[0x%08lX] CBR[0x%08lX] SPI[0x%08lX] SPU[0x%08lX]\n",$psw,$cbr,$spi,$spu
/linux-4.1.27/arch/m32r/platforms/mappi/
Ddot.gdbinit168 printf "PSW[0x%08lX] CBR[0x%08lX] SPI[0x%08lX] SPU[0x%08lX]\n",$psw,$cbr,$spi,$spu
Ddot.gdbinit.nommu168 printf "PSW[0x%08lX] CBR[0x%08lX] SPI[0x%08lX] SPU[0x%08lX]\n",$psw,$cbr,$spi,$spu
Ddot.gdbinit.smp236 printf "PSW[0x%08lX] CBR[0x%08lX] SPI[0x%08lX] SPU[0x%08lX]\n",$psw,$cbr,$spi,$spu
/linux-4.1.27/arch/m32r/platforms/opsput/
Ddot.gdbinit177 printf "PSW[%08lx] CBR[%08lx] SPI[%08lx] SPU[%08lx]\n",$psw,$cbr,$spi,$spu