Searched refs:PPLL_POST3_DIV_MASK (Results 1 - 4 of 4) sorted by relevance

/linux-4.1.27/include/video/
H A Daty128.h269 #define PPLL_POST3_DIV_MASK 0x70000 macro
H A Dradeon.h994 #define PPLL_POST3_DIV_MASK 0x00070000 macro
/linux-4.1.27/drivers/video/fbdev/aty/
H A Dradeon_base.c1255 (PPLL_POST3_DIV_MASK | PPLL_FB3_DIV_MASK)))) { radeon_write_pll_regs()
1304 OUTPLLP(PPLL_DIV_3, mode->ppll_div_3, ~PPLL_POST3_DIV_MASK); radeon_write_pll_regs()
H A Daty128fb.c1363 div3 &= ~PPLL_POST3_DIV_MASK; aty128_set_pll()

Completed in 172 milliseconds