Searched refs:PLX_DMA0_MODE_REG (Results 1 – 3 of 3) sorted by relevance
215 #define PLX_DMA0_MODE_REG 0x80 /* dma channel 0 mode register */ macro
599 writel(bits, plx_iobase + PLX_DMA0_MODE_REG); in gsc_hpdi_init_plx9080()
1327 writel(bits, plx_iobase + PLX_DMA0_MODE_REG); in init_plx9080()