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Searched refs:PLLD_BASE (Results 1 – 4 of 4) sorted by relevance

/linux-4.1.27/drivers/clk/tegra/
Dclk-tegra124.c57 #define PLLD_BASE 0xd0 macro
612 .base_reg = PLLD_BASE,
1496 plld_base = clk_readl(clk_base + PLLD_BASE); in tegra124_132_clock_init_pre()
1498 clk_writel(plld_base, clk_base + PLLD_BASE); in tegra124_132_clock_init_pre()
Dclk-tegra114.c78 #define PLLD_BASE 0xd0 macro
452 .base_reg = PLLD_BASE,
1185 clk_base + PLLD_BASE, 25, 1, 0, &pll_d_lock); in tegra114_periph_clk_init()
Dclk-tegra20.c64 #define PLLD_BASE 0xd0 macro
365 .base_reg = PLLD_BASE,
Dclk-tegra30.c75 #define PLLD_BASE 0xd0 macro
501 .base_reg = PLLD_BASE,