Searched refs:PLL2 (Results 1 – 11 of 11) sorted by relevance
/linux-4.1.27/sound/soc/codecs/ |
D | ak4642.c | 116 #define PLL2 (1 << 6) macro 119 #define PLL_MASK (PLL3 | PLL2 | PLL1 | PLL0) 349 pll = PLL2; in ak4642_dai_set_sysclk() 352 pll = PLL2 | PLL0; in ak4642_dai_set_sysclk() 355 pll = PLL2 | PLL1; in ak4642_dai_set_sysclk() 358 pll = PLL2 | PLL1 | PLL0; in ak4642_dai_set_sysclk() 361 pll = PLL3 | PLL2; in ak4642_dai_set_sysclk() 364 pll = PLL3 | PLL2 | PLL0; in ak4642_dai_set_sysclk() 371 pll = PLL3 | PLL2 | PLL1; in ak4642_dai_set_sysclk() 375 pll = PLL3 | PLL2 | PLL1 | PLL0; in ak4642_dai_set_sysclk()
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/linux-4.1.27/arch/metag/boot/dts/include/dt-bindings/clock/ |
D | qcom,mmcc-msm8960.h | 135 #define PLL2 118 macro
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/linux-4.1.27/arch/powerpc/boot/dts/include/dt-bindings/clock/ |
D | qcom,mmcc-msm8960.h | 135 #define PLL2 118 macro
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/linux-4.1.27/arch/arm/boot/dts/include/dt-bindings/clock/ |
D | qcom,mmcc-msm8960.h | 135 #define PLL2 118 macro
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/linux-4.1.27/include/dt-bindings/clock/ |
D | qcom,mmcc-msm8960.h | 135 #define PLL2 118 macro
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/linux-4.1.27/arch/mips/boot/dts/include/dt-bindings/clock/ |
D | qcom,mmcc-msm8960.h | 135 #define PLL2 118 macro
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/linux-4.1.27/arch/arm64/boot/dts/include/dt-bindings/clock/ |
D | qcom,mmcc-msm8960.h | 135 #define PLL2 118 macro
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/linux-4.1.27/Documentation/devicetree/bindings/clock/ |
D | st,nomadik.txt | 30 - clock-id: must be 1 or 2 for PLL1 and PLL2 respectively
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/linux-4.1.27/drivers/media/dvb-frontends/ |
D | zl10039.c | 55 PLL2, enumerator
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/linux-4.1.27/arch/arm/boot/dts/ |
D | ste-nomadik-stn8815.dtsi | 172 * that is parent of TIMCLK, PLL1 and PLL2 217 /* PLL2 is usually 864 MHz and divided into a few fixed rates */
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/linux-4.1.27/drivers/clk/qcom/ |
D | mmcc-msm8960.c | 2369 [PLL2] = &pll2.clkr, 2529 [PLL2] = &pll2.clkr,
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