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Searched refs:PLL2 (Results 1 – 11 of 11) sorted by relevance

/linux-4.1.27/sound/soc/codecs/
Dak4642.c116 #define PLL2 (1 << 6) macro
119 #define PLL_MASK (PLL3 | PLL2 | PLL1 | PLL0)
349 pll = PLL2; in ak4642_dai_set_sysclk()
352 pll = PLL2 | PLL0; in ak4642_dai_set_sysclk()
355 pll = PLL2 | PLL1; in ak4642_dai_set_sysclk()
358 pll = PLL2 | PLL1 | PLL0; in ak4642_dai_set_sysclk()
361 pll = PLL3 | PLL2; in ak4642_dai_set_sysclk()
364 pll = PLL3 | PLL2 | PLL0; in ak4642_dai_set_sysclk()
371 pll = PLL3 | PLL2 | PLL1; in ak4642_dai_set_sysclk()
375 pll = PLL3 | PLL2 | PLL1 | PLL0; in ak4642_dai_set_sysclk()
/linux-4.1.27/arch/metag/boot/dts/include/dt-bindings/clock/
Dqcom,mmcc-msm8960.h135 #define PLL2 118 macro
/linux-4.1.27/arch/powerpc/boot/dts/include/dt-bindings/clock/
Dqcom,mmcc-msm8960.h135 #define PLL2 118 macro
/linux-4.1.27/arch/arm/boot/dts/include/dt-bindings/clock/
Dqcom,mmcc-msm8960.h135 #define PLL2 118 macro
/linux-4.1.27/include/dt-bindings/clock/
Dqcom,mmcc-msm8960.h135 #define PLL2 118 macro
/linux-4.1.27/arch/mips/boot/dts/include/dt-bindings/clock/
Dqcom,mmcc-msm8960.h135 #define PLL2 118 macro
/linux-4.1.27/arch/arm64/boot/dts/include/dt-bindings/clock/
Dqcom,mmcc-msm8960.h135 #define PLL2 118 macro
/linux-4.1.27/Documentation/devicetree/bindings/clock/
Dst,nomadik.txt30 - clock-id: must be 1 or 2 for PLL1 and PLL2 respectively
/linux-4.1.27/drivers/media/dvb-frontends/
Dzl10039.c55 PLL2, enumerator
/linux-4.1.27/arch/arm/boot/dts/
Dste-nomadik-stn8815.dtsi172 * that is parent of TIMCLK, PLL1 and PLL2
217 /* PLL2 is usually 864 MHz and divided into a few fixed rates */
/linux-4.1.27/drivers/clk/qcom/
Dmmcc-msm8960.c2369 [PLL2] = &pll2.clkr,
2529 [PLL2] = &pll2.clkr,