Searched refs:PHASE (Results 1 – 6 of 6) sorted by relevance
109 * TerraTec PHASE 24 FW/PHASE X24 FW/PHASE 88 Rack FW
527 #define PHASE BIT(13) macro1835 && !((RDW_HARPOON((ioport + hp_intstat)) & PHASE) in FlashPoint_HandleInterrupt()1862 (PROG_HLT | RSEL | PHASE | BUS_FREE)); in FlashPoint_HandleInterrupt()1898 (PHASE | IUNKWN | PROG_HLT)); in FlashPoint_HandleInterrupt()2086 (PROG_HLT | TIMEOUT | SEL | BUS_FREE | PHASE | in FPT_SccbMgr_bad_isr()2674 WRW_HARPOON((port + hp_intstat), PHASE); in FPT_sres()2679 WRW_HARPOON((port + hp_intstat), PHASE); in FPT_sres()2752 (PHASE | RESET)) in FPT_sres()2834 while (!(RDW_HARPOON((port + hp_intstat)) & (PHASE | RESET)) && in FPT_sres()2844 WRW_HARPOON((port + hp_intstat), PHASE); in FPT_SendMsg()[all …]
1019 [ tq TQ prop-seg PROP_SEG phase-seg1 PHASE-SEG11020 phase-seg2 PHASE-SEG2 [ sjw SJW ] ]1033 PHASE-SEG1 := { 1..8 }1034 PHASE-SEG2 := { 1..8 }
124 LOAD/STORE and handles PHASE MISMATCH from SCRIPTS for devices that 130 Chip SDMS BIOS Wide SCSI std. Max. sync SCRIPTS PHASE MISMATCH
341 to testing for a PHASE. SYMBIOS say this feature is working fine.
1012 have detected an expected disconnection (BUS FREE PHASE). For this process