Searched refs:OUT_RING_REG (Results 1 – 4 of 4) sorted by relevance
| /linux-4.1.27/drivers/gpu/drm/radeon/ |
| D | radeon_state.c | 185 OUT_RING_REG(RADEON_SE_TCL_STATE_FLUSH, 0); in radeon_check_and_fixup_packets()
1037 OUT_RING_REG(RADEON_RB3D_DEPTHCLEARVALUE, in radeon_cp_dispatch_clear()
1040 OUT_RING_REG(RADEON_RB3D_ZMASKOFFSET, 0); in radeon_cp_dispatch_clear()
1042 OUT_RING_REG(RADEON_RB3D_ZCACHE_CTLSTAT, in radeon_cp_dispatch_clear()
1232 OUT_RING_REG(RADEON_PP_CNTL, tempPP_CNTL); in radeon_cp_dispatch_clear()
1233 OUT_RING_REG(R200_RE_CNTL, tempRE_CNTL); in radeon_cp_dispatch_clear()
1234 OUT_RING_REG(RADEON_RB3D_CNTL, tempRB3D_CNTL); in radeon_cp_dispatch_clear()
1235 OUT_RING_REG(RADEON_RB3D_ZSTENCILCNTL, tempRB3D_ZSTENCILCNTL); in radeon_cp_dispatch_clear()
1236 OUT_RING_REG(RADEON_RB3D_STENCILREFMASK, in radeon_cp_dispatch_clear()
1238 OUT_RING_REG(RADEON_RB3D_PLANEMASK, tempRB3D_PLANEMASK); in radeon_cp_dispatch_clear()
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| D | radeon_irq.c | 233 OUT_RING_REG(RADEON_LAST_SWI_REG, ret); in radeon_emit_irq()
234 OUT_RING_REG(RADEON_GEN_INT_STATUS, RADEON_SW_INT_FIRE); in radeon_emit_irq()
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| D | r300_cmdbuf.c | 114 OUT_RING_REG(R300_RE_CLIPRECT_CNTL, r300_cliprect_cntl[nr - 1]); in r300_emit_cliprects()
142 OUT_RING_REG(R300_RE_CLIPRECT_CNTL, 0); in r300_emit_cliprects()
422 OUT_RING_REG(R300_VAP_PVS_UPLOAD_ADDRESS, addr); in r300_emit_vpu()
997 OUT_RING_REG(R500_GA_US_VECTOR_INDEX, addr); in r300_emit_r500fp()
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| D | radeon_drv.h | 2112 #define OUT_RING_REG( reg, val ) do { \ macro
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