| H A D | radeon_pm.c | 549 static void OUTMC( struct radeonfb_info *rinfo, u8 indx, u32 value) OUTMC() function
1068 OUTMC( rinfo, ixMC_CHP_IO_CNTL_A1, mc_chp_io_cntl_a1 radeon_pm_yclk_mclk_sync()
1070 OUTMC( rinfo, ixMC_CHP_IO_CNTL_B1, mc_chp_io_cntl_b1 radeon_pm_yclk_mclk_sync()
1073 OUTMC( rinfo, ixMC_CHP_IO_CNTL_A1, mc_chp_io_cntl_a1); radeon_pm_yclk_mclk_sync()
1074 OUTMC( rinfo, ixMC_CHP_IO_CNTL_B1, mc_chp_io_cntl_b1); radeon_pm_yclk_mclk_sync()
1088 OUTMC( rinfo, ixR300_MC_CHP_IO_CNTL_A1, radeon_pm_yclk_mclk_sync_m10()
1090 OUTMC( rinfo, ixR300_MC_CHP_IO_CNTL_B1, radeon_pm_yclk_mclk_sync_m10()
1093 OUTMC( rinfo, ixR300_MC_CHP_IO_CNTL_A1, mc_chp_io_cntl_a1); radeon_pm_yclk_mclk_sync_m10()
1094 OUTMC( rinfo, ixR300_MC_CHP_IO_CNTL_B1, mc_chp_io_cntl_b1); radeon_pm_yclk_mclk_sync_m10()
1203 OUTMC(rinfo, ixR300_MC_DLL_CNTL, rinfo->save_regs[70]); radeon_pm_enable_dll_m10()
1701 OUTMC(rinfo, ixR300_MC_MC_INIT_WR_LAT_TIMER, rinfo->save_regs[58]); radeon_pm_m10_reconfigure_mc()
1702 OUTMC(rinfo, ixR300_MC_IMP_CNTL, rinfo->save_regs[59]); radeon_pm_m10_reconfigure_mc()
1703 OUTMC(rinfo, ixR300_MC_CHP_IO_CNTL_C0, rinfo->save_regs[60]); radeon_pm_m10_reconfigure_mc()
1704 OUTMC(rinfo, ixR300_MC_CHP_IO_CNTL_C1, rinfo->save_regs[61]); radeon_pm_m10_reconfigure_mc()
1705 OUTMC(rinfo, ixR300_MC_CHP_IO_CNTL_D0, rinfo->save_regs[62]); radeon_pm_m10_reconfigure_mc()
1706 OUTMC(rinfo, ixR300_MC_CHP_IO_CNTL_D1, rinfo->save_regs[63]); radeon_pm_m10_reconfigure_mc()
1707 OUTMC(rinfo, ixR300_MC_BIST_CNTL_3, rinfo->save_regs[64]); radeon_pm_m10_reconfigure_mc()
1708 OUTMC(rinfo, ixR300_MC_CHP_IO_CNTL_A0, rinfo->save_regs[65]); radeon_pm_m10_reconfigure_mc()
1709 OUTMC(rinfo, ixR300_MC_CHP_IO_CNTL_A1, rinfo->save_regs[66]); radeon_pm_m10_reconfigure_mc()
1710 OUTMC(rinfo, ixR300_MC_CHP_IO_CNTL_B0, rinfo->save_regs[67]); radeon_pm_m10_reconfigure_mc()
1711 OUTMC(rinfo, ixR300_MC_CHP_IO_CNTL_B1, rinfo->save_regs[68]); radeon_pm_m10_reconfigure_mc()
1712 OUTMC(rinfo, ixR300_MC_DEBUG_CNTL, rinfo->save_regs[69]); radeon_pm_m10_reconfigure_mc()
1713 OUTMC(rinfo, ixR300_MC_DLL_CNTL, rinfo->save_regs[70]); radeon_pm_m10_reconfigure_mc()
1714 OUTMC(rinfo, ixR300_MC_IMP_CNTL_0, rinfo->save_regs[71]); radeon_pm_m10_reconfigure_mc()
1715 OUTMC(rinfo, ixR300_MC_ELPIDA_CNTL, rinfo->save_regs[72]); radeon_pm_m10_reconfigure_mc()
1716 OUTMC(rinfo, ixR300_MC_READ_CNTL_CD, rinfo->save_regs[96]); radeon_pm_m10_reconfigure_mc()
1863 OUTMC(rinfo, ixR300_MC_DLL_CNTL, rinfo->save_regs[70]); radeon_reinitialize_M10()
1962 OUTMC(rinfo, ixMC_IMP_CNTL, rinfo->save_regs[59] /*0x00f460d6*/); radeon_pm_m9p_reconfigure_mc()
1963 OUTMC(rinfo, ixMC_CHP_IO_CNTL_A0, rinfo->save_regs[65] /*0xfecfa666*/); radeon_pm_m9p_reconfigure_mc()
1964 OUTMC(rinfo, ixMC_CHP_IO_CNTL_A1, rinfo->save_regs[66] /*0x141555ff*/); radeon_pm_m9p_reconfigure_mc()
1965 OUTMC(rinfo, ixMC_CHP_IO_CNTL_B0, rinfo->save_regs[67] /*0xfecfa666*/); radeon_pm_m9p_reconfigure_mc()
1966 OUTMC(rinfo, ixMC_CHP_IO_CNTL_B1, rinfo->save_regs[68] /*0x141555ff*/); radeon_pm_m9p_reconfigure_mc()
1967 OUTMC(rinfo, ixMC_IMP_CNTL_0, rinfo->save_regs[71] /*0x00009249*/); radeon_pm_m9p_reconfigure_mc()
2245 OUTMC(rinfo, ixMC_CHP_IO_CNTL_A0, 0xf7bb4433);
2247 OUTMC(rinfo, ixMC_CHP_IO_CNTL_B0, 0xf7bb4433);
2343 OUTMC(rinfo, ixMC_CHP_IO_CNTL_A1, 0x151550ff);
2345 OUTMC(rinfo, ixMC_CHP_IO_CNTL_B1, 0x151550ff);
2348 OUTMC(rinfo, ixMC_CHP_IO_CNTL_A1, 0x141550ff);
2350 OUTMC(rinfo, ixMC_CHP_IO_CNTL_B1, 0x141550ff);
2366 OUTMC(rinfo, ixMC_IMP_CNTL, 0x00f460d6);
2368 OUTMC(rinfo, ixMC_IMP_CNTL_0, 0x00009249);
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