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Searched refs:OMAP_IH2_BASE (Results 1 – 4 of 4) sorted by relevance

/linux-4.1.27/arch/arm/mach-omap1/include/mach/
Dhardware.h187 #define OMAP_IH2_BASE 0xfffe0000 macro
197 #define OMAP_IH2_ITR (OMAP_IH2_BASE + 0x00)
198 #define OMAP_IH2_MIR (OMAP_IH2_BASE + 0x04)
199 #define OMAP_IH2_SIR_IRQ (OMAP_IH2_BASE + 0x10)
200 #define OMAP_IH2_SIR_FIQ (OMAP_IH2_BASE + 0x14)
201 #define OMAP_IH2_CONTROL (OMAP_IH2_BASE + 0x18)
202 #define OMAP_IH2_ILR0 (OMAP_IH2_BASE + 0x1c)
203 #define OMAP_IH2_ISR (OMAP_IH2_BASE + 0x9c)
Dams-delta-fiq.h28 #define DEFERRED_FIQ_IH_BASE OMAP_IH2_BASE
Dentry-macro.S34 ldreq \base, =OMAP1_IO_ADDRESS(OMAP_IH2_BASE)
/linux-4.1.27/arch/arm/mach-omap1/
Dirq.c75 omap_writel(0x1, OMAP_IH2_BASE + IRQ_CONTROL_REG_OFFSET); in omap_ack_irq()
142 { .base_reg = OMAP_IH2_BASE, .trigger_map = 0xfdb9c1f2 },
143 { .base_reg = OMAP_IH2_BASE + 0x100, .trigger_map = 0x800040f3 },
150 { .base_reg = OMAP_IH2_BASE, .trigger_map = 0xffbfffed },
154 { .base_reg = OMAP_IH2_BASE, .trigger_map = 0x65b3c061 },
162 { .base_reg = OMAP_IH2_BASE, .trigger_map = 0xfdb7c1fd },
163 { .base_reg = OMAP_IH2_BASE + 0x100, .trigger_map = 0xffffb7ff },
164 { .base_reg = OMAP_IH2_BASE + 0x200, .trigger_map = 0xffffffff },