Searched refs:OMAP_IH1_BASE (Results 1 – 5 of 5) sorted by relevance
/linux-4.1.27/arch/arm/mach-omap1/include/mach/ |
D | hardware.h | 186 #define OMAP_IH1_BASE 0xfffecb00 macro 189 #define OMAP_IH1_ITR (OMAP_IH1_BASE + 0x00) 190 #define OMAP_IH1_MIR (OMAP_IH1_BASE + 0x04) 191 #define OMAP_IH1_SIR_IRQ (OMAP_IH1_BASE + 0x10) 192 #define OMAP_IH1_SIR_FIQ (OMAP_IH1_BASE + 0x14) 193 #define OMAP_IH1_CONTROL (OMAP_IH1_BASE + 0x18) 194 #define OMAP_IH1_ILR0 (OMAP_IH1_BASE + 0x1c) 195 #define OMAP_IH1_ISR (OMAP_IH1_BASE + 0x9c)
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D | ams-delta-fiq.h | 26 #define DEFERRED_FIQ_IH_BASE OMAP_IH1_BASE
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D | entry-macro.S | 20 ldr \base, =OMAP1_IO_ADDRESS(OMAP_IH1_BASE)
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/linux-4.1.27/arch/arm/mach-omap1/ |
D | irq.c | 77 omap_writel(0x1, OMAP_IH1_BASE + IRQ_CONTROL_REG_OFFSET); in omap_ack_irq() 141 { .base_reg = OMAP_IH1_BASE, .trigger_map = 0xb3f8e22f }, 149 { .base_reg = OMAP_IH1_BASE, .trigger_map = 0xb3febfff }, 153 { .base_reg = OMAP_IH1_BASE, .trigger_map = 0xb3faefc3 }, 161 { .base_reg = OMAP_IH1_BASE, .trigger_map = 0xb3fefe8f },
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D | ams-delta-fiq.c | 153 val = omap_readl(OMAP_IH1_BASE + offset) | 1; in ams_delta_init_fiq() 154 omap_writel(val, OMAP_IH1_BASE + offset); in ams_delta_init_fiq()
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