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Searched refs:NV03_PFIFO_CACHE1_PUT (Results 1 – 3 of 3) sorted by relevance

/linux-4.1.27/drivers/gpu/drm/nouveau/nvkm/engine/fifo/
Dnv04.h42 #define NV03_PFIFO_CACHE1_PUT 0x00003210 macro
Dnv04.c229 nv_wr32(priv, NV03_PFIFO_CACHE1_PUT, 0); in nv04_fifo_chan_fini()
/linux-4.1.27/drivers/gpu/drm/nouveau/
Dnouveau_reg.h477 #define NV03_PFIFO_CACHE1_PUT 0x00003210 macro