Home
last modified time | relevance | path

Searched refs:MXVR_PLL_CTL_0 (Results 1 – 3 of 3) sorted by relevance

/linux-4.1.27/arch/blackfin/mach-bf538/include/mach/
DdefBF539.h15 #define MXVR_PLL_CTL_0 0xFFC02704 /* MXVR Phase Lock Loop Control Register 0 */ macro
DcdefBF539.h15 #define bfin_read_MXVR_PLL_CTL_0() bfin_read32(MXVR_PLL_CTL_0)
16 #define bfin_write_MXVR_PLL_CTL_0(val) bfin_write32(MXVR_PLL_CTL_0, val)
/linux-4.1.27/arch/blackfin/kernel/
Ddebug-mmrs.c1135 # ifdef MXVR_PLL_CTL_0 in bfin_debug_mmrs_init()
1136 D32(MXVR_PLL_CTL_0); in bfin_debug_mmrs_init()