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Searched refs:MPLL_CNTL_MODE (Results 1 – 9 of 9) sorted by relevance

/linux-4.1.27/drivers/gpu/drm/radeon/
Drv740d.h42 #define MPLL_CNTL_MODE 0x61c macro
Drv740_dpm.c401 WREG32_P(MPLL_CNTL_MODE, SS_SSEN, ~SS_SSEN); in rv740_enable_mclk_spread_spectrum()
403 WREG32_P(MPLL_CNTL_MODE, 0, ~SS_SSEN); in rv740_enable_mclk_spread_spectrum()
Dcypress_dpm.c230 WREG32_P(MPLL_CNTL_MODE, SS_SSEN, ~SS_SSEN); in cypress_enable_spread_spectrum()
234 WREG32_P(MPLL_CNTL_MODE, 0, ~SS_SSEN); in cypress_enable_spread_spectrum()
235 WREG32_P(MPLL_CNTL_MODE, 0, ~SS_DSMODE_EN); in cypress_enable_spread_spectrum()
Drv770.c1153 tmp = RREG32(MPLL_CNTL_MODE); in rv770_set_clk_bypass_mode()
1158 WREG32(MPLL_CNTL_MODE, tmp); in rv770_set_clk_bypass_mode()
Drv770d.h114 #define MPLL_CNTL_MODE 0x61c macro
Dnid.h549 #define MPLL_CNTL_MODE 0x61c macro
Dsid.h610 #define MPLL_CNTL_MODE 0x2bb0 macro
Devergreend.h93 #define MPLL_CNTL_MODE 0x61c macro
Dsi.c4003 tmp = RREG32(MPLL_CNTL_MODE); in si_set_clk_bypass_mode()
4005 WREG32(MPLL_CNTL_MODE, tmp); in si_set_clk_bypass_mode()