Searched refs:MMP2_CLK_CCIC1_SPHY (Results 1 - 7 of 7) sorted by relevance
| /linux-4.1.27/arch/mips/boot/dts/include/dt-bindings/clock/ |
| H A D | marvell,mmp2.h | 71 #define MMP2_CLK_CCIC1_SPHY 119 macro
|
| /linux-4.1.27/arch/powerpc/boot/dts/include/dt-bindings/clock/ |
| H A D | marvell,mmp2.h | 71 #define MMP2_CLK_CCIC1_SPHY 119 macro
|
| /linux-4.1.27/arch/arm64/boot/dts/include/dt-bindings/clock/ |
| H A D | marvell,mmp2.h | 71 #define MMP2_CLK_CCIC1_SPHY 119 macro
|
| /linux-4.1.27/arch/metag/boot/dts/include/dt-bindings/clock/ |
| H A D | marvell,mmp2.h | 71 #define MMP2_CLK_CCIC1_SPHY 119 macro
|
| /linux-4.1.27/arch/arm/boot/dts/include/dt-bindings/clock/ |
| H A D | marvell,mmp2.h | 71 #define MMP2_CLK_CCIC1_SPHY 119 macro
|
| /linux-4.1.27/include/dt-bindings/clock/ |
| H A D | marvell,mmp2.h | 71 #define MMP2_CLK_CCIC1_SPHY 119 macro
|
| /linux-4.1.27/drivers/clk/mmp/ |
| H A D | clk-of-mmp2.c | 237 {MMP2_CLK_CCIC1_SPHY, "ccic1_sphy_clk", "ccic1_sphy_div", CLK_SET_RATE_PARENT, APMU_CCIC1, 0x300, 0x300, 0x0, 0, &ccic1_lock},
|
Completed in 44 milliseconds