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Searched refs:MISS (Results 1 – 6 of 6) sorted by relevance

/linux-4.1.27/arch/x86/kernel/cpu/
Dperf_event_intel_ds.c52 #define SNOOP_NONE_MISS (P(SNOOP, NONE) | P(SNOOP, MISS))
55 P(OP, LOAD) | P(LVL, MISS) | P(LVL, L3) | P(SNOOP, NA),/* 0x00:ukn L3 */
60 OP_LH | P(LVL, L3) | P(SNOOP, MISS), /* 0x05: L3 hit, snoop miss */
88 val |= P(TLB, MISS); in precise_store_data()
100 val |= P(LVL, MISS); in precise_store_data()
167 val |= P(TLB, MISS) | P(TLB, L2); in load_latency_data()
Dperf_event_p4.c98 P4_ESCR_EMASK_BIT(P4_EVENT_ITLB_REFERENCE, MISS) |
549 [ C(RESULT_MISS) ] = P4_GEN_CACHE_EVENT(P4_EVENT_ITLB_REFERENCE, MISS,
/linux-4.1.27/drivers/net/ethernet/amd/
Dariadne.c285 if (csr0 & MISS) in ariadne_interrupt()
368 if (csr0 & MISS) { in ariadne_interrupt()
383 lance->RDP = INEA | BABL | CERR | MISS | MERR | IDON; in ariadne_interrupt()
Dariadne.h182 #define MISS 0x0010 /* Missed Frame */ macro
/linux-4.1.27/Documentation/device-mapper/
Dcache-policies.txt11 The policy can return a simple HIT or MISS or issue a migration.
/linux-4.1.27/arch/x86/include/asm/
Dperf_event_p4.h605 P4_GEN_ESCR_EMASK(P4_EVENT_ITLB_REFERENCE, MISS, 1),