| /linux-4.1.27/drivers/clk/shmobile/ |
| H A D | clk-r8a7779.c | 51 * (MD2 = 0) 62.5 (1/24) 66.6 (1/24)
52 * (MD2 = 1) 41.6 (1/36) 50 (1/32)
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| /linux-4.1.27/arch/arm/mach-shmobile/ |
| H A D | clock-r8a7779.c | 43 * (MD2 = 0) 62.5 (1/24) 66.6 (1/24)
44 * (MD2 = 1) 41.6 (1/36) 50 (1/32)
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| /linux-4.1.27/drivers/net/wan/ |
| H A D | hd64570.c | 411 u8 md2 = sca_in(msci + MD2, card); sca_set_port()
455 sca_out(md2, msci + MD2, card); sca_set_port()
489 sca_out(md2, msci + MD2, card); sca_open()
601 sca_in(get_msci(port) + MD2, card), sca_dump_rings()
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| H A D | hd64572.c | 374 u8 md2 = sca_in(msci + MD2, card); sca_set_port()
419 sca_out(md2, msci + MD2, card); sca_set_port()
453 sca_out(md2, msci + MD2, card); sca_open()
549 sca_in(get_msci(port) + MD2, card), sca_dump_rings()
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| H A D | hd64570.h | 61 #define MD2 0x10 /* Mode 2 */ macro
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| H A D | hd64572.h | 67 #define MD2 0x13a /* Mode reg 2 */ macro
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| /linux-4.1.27/arch/sh/include/cpu-sh4/cpu/ |
| H A D | sh7722.h | 8 * MD2: CPG - Reserved (L: Normal operation)
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| H A D | sh7723.h | 8 * MD2: CPG - Reserved (L: Normal operation)
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| H A D | sh7724.h | 8 * MD2: CPG - Clock Mode 0->7
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| /linux-4.1.27/drivers/media/dvb-frontends/ |
| H A D | tda18271c2dd.c | 76 MPD, MD1, MD2, MD3, enumerator in enum:ERegister
357 state->m_Regs[MD2] = ((MainDiv >> 8) & 0xFF); CalcMainPLL()
802 state->m_Regs[MD2] = 0x08; FixedContentsI2CUpdate()
845 state->m_Regs[MD2] = 0x1A; FixedContentsI2CUpdate()
876 state->m_Regs[MD2] = 0xCD; FixedContentsI2CUpdate()
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| /linux-4.1.27/drivers/tty/ |
| H A D | synclinkmp.c | 325 #define MD2 0x30 macro
4032 /* MD2 (Mode Register 2) enable_loopback()
4035 write_reg(info, MD2, (unsigned char)(read_reg(info, MD2) | (BIT1 + BIT0))); enable_loopback()
4050 /* MD2 (Mode Register 2) enable_loopback()
4053 write_reg(info, MD2, (unsigned char)(read_reg(info, MD2) & ~(BIT1 + BIT0))); enable_loopback()
4427 /* MD2, Mode Register 2 async_mode()
4437 write_reg(info, MD2, RegValue); async_mode()
4568 /* MD2, Mode Register 2 hdlc_mode()
4599 write_reg(info, MD2, RegValue); hdlc_mode()
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| /linux-4.1.27/arch/sh/boards/mach-ap325rxa/ |
| H A D | setup.c | 685 /* MD0=0, MD1=0, MD2=0: Clock Mode 0 ap325rxa_mode_pins()
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| /linux-4.1.27/arch/sh/boards/mach-kfr2r09/ |
| H A D | setup.c | 647 /* MD0=1, MD1=1, MD2=0: Clock Mode 3 kfr2r09_mode_pins()
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| /linux-4.1.27/arch/sh/boards/mach-migor/ |
| H A D | setup.c | 661 /* MD0=1, MD1=1, MD2=0: Clock Mode 3 migor_mode_pins()
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| /linux-4.1.27/drivers/firewire/ |
| H A D | sbp2.c | 374 /* Datafab MD2-FW2 with Symbios/LSILogic SYM13FW500 bridge */ {
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| /linux-4.1.27/arch/blackfin/include/asm/ |
| H A D | bfin_can.h | 224 #define MD2 0x0004 /* Enable Mailbox 2 For Receive */ macro
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| /linux-4.1.27/arch/blackfin/kernel/ |
| H A D | debug-mmrs.c | 142 __CAN(MD2, md2); bfin_debug_mmrs_can()
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