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Searched refs:LS1X_CLK_PLL_DIV (Results 1 – 3 of 3) sorted by relevance

/linux-4.1.27/drivers/clk/
Dclk-ls1x.c107 CLK_GET_RATE_NOCACHE, LS1X_CLK_PLL_DIV, in ls1x_clk_init()
114 CLK_SET_RATE_NO_REPARENT, LS1X_CLK_PLL_DIV, in ls1x_clk_init()
125 0, LS1X_CLK_PLL_DIV, DIV_DC_SHIFT, in ls1x_clk_init()
130 CLK_SET_RATE_NO_REPARENT, LS1X_CLK_PLL_DIV, in ls1x_clk_init()
141 0, LS1X_CLK_PLL_DIV, DIV_DDR_SHIFT, in ls1x_clk_init()
147 CLK_SET_RATE_NO_REPARENT, LS1X_CLK_PLL_DIV, in ls1x_clk_init()
/linux-4.1.27/drivers/cpufreq/
Dls1x-cpufreq.c65 __raw_writel(__raw_readl(LS1X_CLK_PLL_DIV) | RST_CPU_EN | RST_CPU, in ls1x_cpufreq_target()
66 LS1X_CLK_PLL_DIV); in ls1x_cpufreq_target()
67 __raw_writel(__raw_readl(LS1X_CLK_PLL_DIV) & ~(RST_CPU_EN | RST_CPU), in ls1x_cpufreq_target()
68 LS1X_CLK_PLL_DIV); in ls1x_cpufreq_target()
/linux-4.1.27/arch/mips/include/asm/mach-loongson1/
Dregs-clk.h19 #define LS1X_CLK_PLL_DIV LS1X_CLK_REG(0x4) macro