Searched refs:LCD_SPU_DMA_CTRL1 (Results 1 – 6 of 6) sorted by relevance
64 LCD_SPU_DMA_CTRL1 = 0x0194, enumerator
612 armada_reg_queue_mod(regs, i, val, CFG_VSYNC_INV, LCD_SPU_DMA_CTRL1); in armada_drm_crtc_mode_set()1097 writel_relaxed(0x2032ff81, dcrtc->base + LCD_SPU_DMA_CTRL1); in armada_drm_crtc_create()
67 dcrtc->base + LCD_SPU_DMA_CTRL1); in armada_ovl_update_attr()
338 x = readl(fbi->reg_base + LCD_SPU_DMA_CTRL1); in set_dma_control1()348 writel(x, fbi->reg_base + LCD_SPU_DMA_CTRL1); in set_dma_control1()
265 #define LCD_SPU_DMA_CTRL1 0x0194 macro
142 LCD_PN2_CTRL1) : LCD_SPU_DMA_CTRL1)505 #define LCD_SPU_DMA_CTRL1 0x0194 macro