Searched refs:L2X0_CACHE_SYNC (Results 1 - 4 of 4) sorted by relevance

/linux-4.1.27/arch/arm/include/asm/hardware/
H A Dcache-l2x0.h40 #define L2X0_CACHE_SYNC 0x730 macro
/linux-4.1.27/arch/arm/mach-imx/
H A Dsuspend-imx6.S83 str r6, [r11, #L2X0_CACHE_SYNC]
85 ldr r6, [r11, #L2X0_CACHE_SYNC]
/linux-4.1.27/arch/arm/mach-omap2/
H A Dsleep44xx.S180 str r0, [r2, #L2X0_CACHE_SYNC]
182 ldr r0, [r2, #L2X0_CACHE_SYNC]
/linux-4.1.27/arch/arm/mm/
H A Dcache-l2x0.c55 static unsigned long sync_reg_offset = L2X0_CACHE_SYNC;
180 * Never has a different sync register other than L2X0_CACHE_SYNC, but
278 writel_relaxed(0, base + L2X0_CACHE_SYNC); __l2c220_cache_sync()
279 l2c_wait_mask(base + L2X0_CACHE_SYNC, 1); __l2c220_cache_sync()

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