| /linux-4.1.27/arch/alpha/lib/ |
| D | ev67-strncat.S | 57 bsr $23, __stxncpy # L0 :/* Now do the append. */
64 ret # L0 :
80 ret # L0 :
86 ret # L0 :
92 ret # L0 :
|
| D | ev6-copy_user.S | 130 br $31, $dirtyentry # L0 .. .. .. : L U U L
234 ret $31,($28),1 # L0 .. .. .. : L U L U
256 ret $31,($28),1 # L0
|
| D | ev6-memset.S | 213 ret $31,($26),1 # L0 :
230 ret $31,($26),1 # L0 :
390 ret $31,($26),1 # L0 :
407 ret $31,($26),1 # L0 :
577 ret $31,($26),1 # L0 :
594 ret $31,($26),1 # L0 :
|
| D | ev6-divide.S | 206 ret $31,($23),1 # L0 : L U U L
243 bsr $23,ufunction # L0: L U L U
258 ret $31,($23),1 # L0 : L U U L
|
| D | ev6-memchr.S | 95 ret # L0 : L U L U
119 ret # L0 : L U L U
189 ret # L0 :
|
| D | ev6-memcpy.S | 86 ldq $6, 0($17) # L0 : bytes 0..7
175 ret $31, ($26), 1 # L0 :
239 ret $31, ($26), 1 # L0 :
|
| D | ev6-stxncpy.S | 132 ret (t9) # L0 : Latency=3
139 br $a_eos # L0 : Latency=3
311 ret (t9) # L0 : Latency=3
332 br $u_final # L0 : Latency=3
392 ret (t9) # L0 : Latency=3
|
| D | ev67-strcat.S | 52 br __stxcpy # L0 :
|
| D | ev67-strlen.S | 47 ret $31, ($26) # L0 :
|
| D | ev6-stxcpy.S | 108 ret (t9) # L0 : Latency=3
134 br stxcpy_aligned # L0 : Latency=3
258 ret (t9) # L0 : Latency=3
|
| D | ev67-strchr.S | 86 ret # L0 :
|
| D | ev6-csum_ipv6_magic.S | 148 ret # L0 : L U L U
|
| D | ev67-strrchr.S | 105 ret # L0 : Latency=3
|
| D | ev6-clear_user.S | 223 ret $31, ($28), 1 # L0 .. .. .. : L U L U
|
| /linux-4.1.27/scripts/rt-tester/ |
| D | t3-l1-pi-1rt.tst | 58 # T0 lock L0
62 # T1 lock L0
67 # T2 lock L0
72 # T0 unlock L0
80 # T2 unlock L0
|
| D | t3-l1-pi-3rt.tst | 58 # T0 lock L0
62 # T1 lock L0
67 # T2 lock L0
72 # T0 unlock L0
80 # T2 unlock L0
|
| D | t3-l2-pi.tst | 58 # T0 lock L0
62 # T1 lock L0
67 # T2 lock L0
72 # T0 unlock L0
80 # T2 unlock L0
|
| D | t3-l1-pi-2rt.tst | 58 # T0 lock L0
62 # T1 lock L0
67 # T2 lock L0
73 # T0 unlock L0
81 # T2 unlock L0
|
| D | t3-l1-pi-steal.tst | 58 # T0 lock L0
62 # T1 lock L0
67 # T0 unlock L0
74 # T2 lock L0
83 # T2 unlock L0
|
| D | t3-l1-pi-signal.tst | 56 # T0 lock L0
60 # T1 lock L0, no wait in the wakeup path
66 # T2 lock L0 interruptible, no wait in the wakeup path
81 # T0 unlock L0
84 # Wait until T1 has locked L0 and exit
|
| D | t2-l1-2rt-sameprio.tst | 57 # T0 lock L0
64 # T0 unlock L0
76 # T1,T0 lock L0
83 # T1 unlock L0
|
| D | t2-l1-pi.tst | 57 # T0 lock L0
61 # T1 lock L0
66 # T0 unlock L0
|
| D | t2-l1-signal.tst | 57 # T0 lock L0
61 # T1 lock L0
|
| D | t2-l2-2rt-deadlock.tst | 57 # T0 lock L0
69 # T1 lock L0
|
| D | t5-l4-pi-boost-deboost.tst | 60 # T0 lock L0
68 # T1 lock L0
|
| D | t4-l2-pi-deboost.tst | 59 # T0 lock L0
67 # T3 lock L0
|
| D | t5-l4-pi-boost-deboost-setsched.tst | 60 # T0 lock L0
68 # T1 lock L0
|
| /linux-4.1.27/drivers/cpufreq/ |
| D | s5pv210-cpufreq.c | 111 L0, L1, L2, L3, L4, enumerator
126 {0, L0, 1000*1000},
146 [L0] = {
270 if ((index == L0) || (priv_index == L0)) in s5pv210_target()
389 if (index == L0) in s5pv210_target()
|
| D | exynos-cpufreq.h | 13 L0, L1, L2, L3, L4, enumerator
|
| D | exynos4210-cpufreq.c | 35 {0, L0, 1200 * 1000},
|
| D | exynos5250-cpufreq.c | 38 {0, L0, 1700 * 1000},
|
| D | exynos4x12-cpufreq.c | 36 {CPUFREQ_BOOST_FREQ, L0, 1500 * 1000},
|
| D | exynos5440-cpufreq.c | 93 L0, L1, L2, L3, L4, enumerator
|
| /linux-4.1.27/arch/xtensa/lib/ |
| D | memset.S | 55 .L0: # return here from .Ldstunaligned when dst is aligned label
121 bbci.l a5, 1, .L0 # if now aligned, return to main algorithm
128 j .L0 # dst is now aligned, return to main algorithm
|
| /linux-4.1.27/arch/sh/lib/ |
| D | __clear_user.S | 35 .L0: dt r3 define
37 bf/s .L0
|
| /linux-4.1.27/arch/blackfin/kernel/cplb-nompu/ |
| D | Makefile | 8 -ffixed-L0 -ffixed-L1 -ffixed-L2 -ffixed-L3 \
|
| /linux-4.1.27/arch/blackfin/kernel/cplb-mpu/ |
| D | Makefile | 8 -ffixed-L0 -ffixed-L1 -ffixed-L2 -ffixed-L3 \
|
| /linux-4.1.27/arch/arm/mach-omap2/ |
| D | sram243x.S | 76 mov r9, #0x0 @ shift back to L0-voltage
81 str r3, [r2] @ go to L0-freq operation
115 orr r5, r5, r9 @ bulld value for L0/L1-volt operation.
210 orr r8, r8, r9 @ bulld value for L0/L1-volt operation.
|
| D | sram242x.S | 76 mov r9, #0x0 @ shift back to L0-voltage
81 str r3, [r2] @ go to L0-freq operation
115 orr r5, r5, r9 @ bulld value for L0/L1-volt operation.
210 orr r8, r8, r9 @ bulld value for L0/L1-volt operation.
|
| /linux-4.1.27/Documentation/zh_CN/arm64/ |
| D | memory.txt | 91 | +-------------------------------> [47:39] L0 索引
|
| /linux-4.1.27/Documentation/virtual/kvm/ |
| D | nested-vmx.txt | 30 L0, the guest hypervisor, which we call L1, and its nested guest, which we
80 also have "vmcs01", the VMCS that L0 built for L1, and "vmcs02" is the VMCS
81 which L0 builds to actually run L2 - how this is done is explained in the
|
| /linux-4.1.27/arch/blackfin/mach-bf561/ |
| D | secondary.S | 47 L0 = r6; define
|
| /linux-4.1.27/arch/sh/lib64/ |
| D | memcpy.S | 57 movi (L1-L0+63*32 + 1) & 0xffff,r1
59 L0: ptrel r0,tr0 label
|
| D | copy_user_memcpy.S | 72 movi (L1-L0+63*32 + 1) & 0xffff,r1
74 L0: ptrel r0,tr0 label
|
| /linux-4.1.27/drivers/pci/pcie/ |
| D | Kconfig | 37 state L0/L0s/L1.
|
| /linux-4.1.27/arch/blackfin/mach-common/ |
| D | head.S | 56 L0 = r6; define
|
| /linux-4.1.27/Documentation/arm64/ |
| D | memory.txt | 71 | +-------------------------------> [47:39] L0 index
|