Searched refs:IRQ_INTERNAL_BASE (Results 1 - 3 of 3) sorted by relevance

/linux-4.1.27/arch/mips/include/asm/mach-bcm63xx/
H A Dbcm63xx_cpu.h644 #define BCM_3368_TIMER_IRQ (IRQ_INTERNAL_BASE + 0)
645 #define BCM_3368_SPI_IRQ (IRQ_INTERNAL_BASE + 1)
646 #define BCM_3368_UART0_IRQ (IRQ_INTERNAL_BASE + 2)
647 #define BCM_3368_UART1_IRQ (IRQ_INTERNAL_BASE + 3)
651 #define BCM_3368_ENET0_IRQ (IRQ_INTERNAL_BASE + 8)
652 #define BCM_3368_ENET1_IRQ (IRQ_INTERNAL_BASE + 6)
653 #define BCM_3368_ENET_PHY_IRQ (IRQ_INTERNAL_BASE + 9)
654 #define BCM_3368_ENET0_RXDMA_IRQ (IRQ_INTERNAL_BASE + 15)
655 #define BCM_3368_ENET0_TXDMA_IRQ (IRQ_INTERNAL_BASE + 16)
665 #define BCM_3368_ENET1_RXDMA_IRQ (IRQ_INTERNAL_BASE + 17)
666 #define BCM_3368_ENET1_TXDMA_IRQ (IRQ_INTERNAL_BASE + 18)
667 #define BCM_3368_PCI_IRQ (IRQ_INTERNAL_BASE + 31)
681 #define BCM_3368_EXT_IRQ0 (IRQ_INTERNAL_BASE + 25)
682 #define BCM_3368_EXT_IRQ1 (IRQ_INTERNAL_BASE + 26)
683 #define BCM_3368_EXT_IRQ2 (IRQ_INTERNAL_BASE + 27)
684 #define BCM_3368_EXT_IRQ3 (IRQ_INTERNAL_BASE + 28)
690 #define BCM_6328_HIGH_IRQ_BASE (IRQ_INTERNAL_BASE + 32)
692 #define BCM_6328_TIMER_IRQ (IRQ_INTERNAL_BASE + 31)
694 #define BCM_6328_UART0_IRQ (IRQ_INTERNAL_BASE + 28)
696 #define BCM_6328_DSL_IRQ (IRQ_INTERNAL_BASE + 4)
700 #define BCM_6328_ENET_PHY_IRQ (IRQ_INTERNAL_BASE + 12)
701 #define BCM_6328_HSSPI_IRQ (IRQ_INTERNAL_BASE + 29)
704 #define BCM_6328_USBD_IRQ (IRQ_INTERNAL_BASE + 4)
705 #define BCM_6328_USBD_RXDMA0_IRQ (IRQ_INTERNAL_BASE + 5)
706 #define BCM_6328_USBD_TXDMA0_IRQ (IRQ_INTERNAL_BASE + 6)
707 #define BCM_6328_USBD_RXDMA1_IRQ (IRQ_INTERNAL_BASE + 7)
708 #define BCM_6328_USBD_TXDMA1_IRQ (IRQ_INTERNAL_BASE + 8)
709 #define BCM_6328_USBD_RXDMA2_IRQ (IRQ_INTERNAL_BASE + 9)
710 #define BCM_6328_USBD_TXDMA2_IRQ (IRQ_INTERNAL_BASE + 10)
716 #define BCM_6328_PCI_IRQ (IRQ_INTERNAL_BASE + 23)
729 #define BCM_6328_PCM_DMA0_IRQ (IRQ_INTERNAL_BASE + 2)
730 #define BCM_6328_PCM_DMA1_IRQ (IRQ_INTERNAL_BASE + 3)
731 #define BCM_6328_EXT_IRQ0 (IRQ_INTERNAL_BASE + 24)
732 #define BCM_6328_EXT_IRQ1 (IRQ_INTERNAL_BASE + 25)
733 #define BCM_6328_EXT_IRQ2 (IRQ_INTERNAL_BASE + 26)
734 #define BCM_6328_EXT_IRQ3 (IRQ_INTERNAL_BASE + 27)
739 #define BCM_6338_TIMER_IRQ (IRQ_INTERNAL_BASE + 0)
740 #define BCM_6338_SPI_IRQ (IRQ_INTERNAL_BASE + 1)
741 #define BCM_6338_UART0_IRQ (IRQ_INTERNAL_BASE + 2)
743 #define BCM_6338_DSL_IRQ (IRQ_INTERNAL_BASE + 5)
744 #define BCM_6338_ENET0_IRQ (IRQ_INTERNAL_BASE + 8)
746 #define BCM_6338_ENET_PHY_IRQ (IRQ_INTERNAL_BASE + 9)
757 #define BCM_6338_ENET0_RXDMA_IRQ (IRQ_INTERNAL_BASE + 15)
758 #define BCM_6338_ENET0_TXDMA_IRQ (IRQ_INTERNAL_BASE + 16)
778 #define BCM_6345_TIMER_IRQ (IRQ_INTERNAL_BASE + 0)
780 #define BCM_6345_UART0_IRQ (IRQ_INTERNAL_BASE + 2)
782 #define BCM_6345_DSL_IRQ (IRQ_INTERNAL_BASE + 3)
783 #define BCM_6345_ENET0_IRQ (IRQ_INTERNAL_BASE + 8)
785 #define BCM_6345_ENET_PHY_IRQ (IRQ_INTERNAL_BASE + 12)
796 #define BCM_6345_ENET0_RXDMA_IRQ (IRQ_INTERNAL_BASE + 13 + 1)
797 #define BCM_6345_ENET0_TXDMA_IRQ (IRQ_INTERNAL_BASE + 13 + 2)
817 #define BCM_6348_TIMER_IRQ (IRQ_INTERNAL_BASE + 0)
818 #define BCM_6348_SPI_IRQ (IRQ_INTERNAL_BASE + 1)
819 #define BCM_6348_UART0_IRQ (IRQ_INTERNAL_BASE + 2)
821 #define BCM_6348_DSL_IRQ (IRQ_INTERNAL_BASE + 4)
822 #define BCM_6348_ENET0_IRQ (IRQ_INTERNAL_BASE + 8)
823 #define BCM_6348_ENET1_IRQ (IRQ_INTERNAL_BASE + 7)
824 #define BCM_6348_ENET_PHY_IRQ (IRQ_INTERNAL_BASE + 9)
826 #define BCM_6348_OHCI0_IRQ (IRQ_INTERNAL_BASE + 12)
835 #define BCM_6348_ENET0_RXDMA_IRQ (IRQ_INTERNAL_BASE + 20)
836 #define BCM_6348_ENET0_TXDMA_IRQ (IRQ_INTERNAL_BASE + 21)
837 #define BCM_6348_ENET1_RXDMA_IRQ (IRQ_INTERNAL_BASE + 22)
838 #define BCM_6348_ENET1_TXDMA_IRQ (IRQ_INTERNAL_BASE + 23)
839 #define BCM_6348_PCI_IRQ (IRQ_INTERNAL_BASE + 24)
840 #define BCM_6348_PCMCIA_IRQ (IRQ_INTERNAL_BASE + 24)
841 #define BCM_6348_ATM_IRQ (IRQ_INTERNAL_BASE + 5)
856 #define BCM_6358_TIMER_IRQ (IRQ_INTERNAL_BASE + 0)
857 #define BCM_6358_SPI_IRQ (IRQ_INTERNAL_BASE + 1)
858 #define BCM_6358_UART0_IRQ (IRQ_INTERNAL_BASE + 2)
859 #define BCM_6358_UART1_IRQ (IRQ_INTERNAL_BASE + 3)
860 #define BCM_6358_DSL_IRQ (IRQ_INTERNAL_BASE + 29)
861 #define BCM_6358_ENET0_IRQ (IRQ_INTERNAL_BASE + 8)
862 #define BCM_6358_ENET1_IRQ (IRQ_INTERNAL_BASE + 6)
863 #define BCM_6358_ENET_PHY_IRQ (IRQ_INTERNAL_BASE + 9)
865 #define BCM_6358_OHCI0_IRQ (IRQ_INTERNAL_BASE + 5)
866 #define BCM_6358_EHCI0_IRQ (IRQ_INTERNAL_BASE + 10)
874 #define BCM_6358_ENET0_RXDMA_IRQ (IRQ_INTERNAL_BASE + 15)
875 #define BCM_6358_ENET0_TXDMA_IRQ (IRQ_INTERNAL_BASE + 16)
876 #define BCM_6358_ENET1_RXDMA_IRQ (IRQ_INTERNAL_BASE + 17)
877 #define BCM_6358_ENET1_TXDMA_IRQ (IRQ_INTERNAL_BASE + 18)
878 #define BCM_6358_PCI_IRQ (IRQ_INTERNAL_BASE + 31)
879 #define BCM_6358_PCMCIA_IRQ (IRQ_INTERNAL_BASE + 24)
880 #define BCM_6358_ATM_IRQ (IRQ_INTERNAL_BASE + 19)
892 #define BCM_6358_PCM_DMA0_IRQ (IRQ_INTERNAL_BASE + 23)
893 #define BCM_6358_PCM_DMA1_IRQ (IRQ_INTERNAL_BASE + 24)
894 #define BCM_6358_EXT_IRQ0 (IRQ_INTERNAL_BASE + 25)
895 #define BCM_6358_EXT_IRQ1 (IRQ_INTERNAL_BASE + 26)
896 #define BCM_6358_EXT_IRQ2 (IRQ_INTERNAL_BASE + 27)
897 #define BCM_6358_EXT_IRQ3 (IRQ_INTERNAL_BASE + 28)
902 #define BCM_6362_HIGH_IRQ_BASE (IRQ_INTERNAL_BASE + 32)
904 #define BCM_6362_TIMER_IRQ (IRQ_INTERNAL_BASE + 0)
905 #define BCM_6362_SPI_IRQ (IRQ_INTERNAL_BASE + 2)
906 #define BCM_6362_UART0_IRQ (IRQ_INTERNAL_BASE + 3)
907 #define BCM_6362_UART1_IRQ (IRQ_INTERNAL_BASE + 4)
908 #define BCM_6362_DSL_IRQ (IRQ_INTERNAL_BASE + 28)
912 #define BCM_6362_ENET_PHY_IRQ (IRQ_INTERNAL_BASE + 14)
913 #define BCM_6362_HSSPI_IRQ (IRQ_INTERNAL_BASE + 5)
914 #define BCM_6362_OHCI0_IRQ (IRQ_INTERNAL_BASE + 9)
915 #define BCM_6362_EHCI0_IRQ (IRQ_INTERNAL_BASE + 10)
916 #define BCM_6362_USBD_IRQ (IRQ_INTERNAL_BASE + 11)
917 #define BCM_6362_USBD_RXDMA0_IRQ (IRQ_INTERNAL_BASE + 20)
918 #define BCM_6362_USBD_TXDMA0_IRQ (IRQ_INTERNAL_BASE + 21)
919 #define BCM_6362_USBD_RXDMA1_IRQ (IRQ_INTERNAL_BASE + 22)
920 #define BCM_6362_USBD_TXDMA1_IRQ (IRQ_INTERNAL_BASE + 23)
921 #define BCM_6362_USBD_RXDMA2_IRQ (IRQ_INTERNAL_BASE + 24)
922 #define BCM_6362_USBD_TXDMA2_IRQ (IRQ_INTERNAL_BASE + 25)
928 #define BCM_6362_PCI_IRQ (IRQ_INTERNAL_BASE + 30)
941 #define BCM_6362_RING_OSC_IRQ (IRQ_INTERNAL_BASE + 1)
942 #define BCM_6362_WLAN_GPIO_IRQ (IRQ_INTERNAL_BASE + 6)
943 #define BCM_6362_WLAN_IRQ (IRQ_INTERNAL_BASE + 7)
944 #define BCM_6362_IPSEC_IRQ (IRQ_INTERNAL_BASE + 8)
945 #define BCM_6362_NAND_IRQ (IRQ_INTERNAL_BASE + 12)
946 #define BCM_6362_PCM_IRQ (IRQ_INTERNAL_BASE + 13)
947 #define BCM_6362_DG_IRQ (IRQ_INTERNAL_BASE + 15)
948 #define BCM_6362_EPHY_ENERGY0_IRQ (IRQ_INTERNAL_BASE + 16)
949 #define BCM_6362_EPHY_ENERGY1_IRQ (IRQ_INTERNAL_BASE + 17)
950 #define BCM_6362_EPHY_ENERGY2_IRQ (IRQ_INTERNAL_BASE + 18)
951 #define BCM_6362_EPHY_ENERGY3_IRQ (IRQ_INTERNAL_BASE + 19)
952 #define BCM_6362_IPSEC_DMA0_IRQ (IRQ_INTERNAL_BASE + 26)
953 #define BCM_6362_IPSEC_DMA1_IRQ (IRQ_INTERNAL_BASE + 27)
954 #define BCM_6362_FAP0_IRQ (IRQ_INTERNAL_BASE + 29)
967 #define BCM_6368_HIGH_IRQ_BASE (IRQ_INTERNAL_BASE + 32)
969 #define BCM_6368_TIMER_IRQ (IRQ_INTERNAL_BASE + 0)
970 #define BCM_6368_SPI_IRQ (IRQ_INTERNAL_BASE + 1)
971 #define BCM_6368_UART0_IRQ (IRQ_INTERNAL_BASE + 2)
972 #define BCM_6368_UART1_IRQ (IRQ_INTERNAL_BASE + 3)
973 #define BCM_6368_DSL_IRQ (IRQ_INTERNAL_BASE + 4)
976 #define BCM_6368_ENET_PHY_IRQ (IRQ_INTERNAL_BASE + 15)
978 #define BCM_6368_OHCI0_IRQ (IRQ_INTERNAL_BASE + 5)
979 #define BCM_6368_EHCI0_IRQ (IRQ_INTERNAL_BASE + 7)
980 #define BCM_6368_USBD_IRQ (IRQ_INTERNAL_BASE + 8)
981 #define BCM_6368_USBD_RXDMA0_IRQ (IRQ_INTERNAL_BASE + 26)
982 #define BCM_6368_USBD_TXDMA0_IRQ (IRQ_INTERNAL_BASE + 27)
983 #define BCM_6368_USBD_RXDMA1_IRQ (IRQ_INTERNAL_BASE + 28)
984 #define BCM_6368_USBD_TXDMA1_IRQ (IRQ_INTERNAL_BASE + 29)
985 #define BCM_6368_USBD_RXDMA2_IRQ (IRQ_INTERNAL_BASE + 30)
986 #define BCM_6368_USBD_TXDMA2_IRQ (IRQ_INTERNAL_BASE + 31)
992 #define BCM_6368_PCI_IRQ (IRQ_INTERNAL_BASE + 13)
1002 #define BCM_6368_XTM_IRQ (IRQ_INTERNAL_BASE + 11)
1007 #define BCM_6368_EXT_IRQ0 (IRQ_INTERNAL_BASE + 20)
1008 #define BCM_6368_EXT_IRQ1 (IRQ_INTERNAL_BASE + 21)
1009 #define BCM_6368_EXT_IRQ2 (IRQ_INTERNAL_BASE + 22)
1010 #define BCM_6368_EXT_IRQ3 (IRQ_INTERNAL_BASE + 23)
1011 #define BCM_6368_EXT_IRQ4 (IRQ_INTERNAL_BASE + 24)
1012 #define BCM_6368_EXT_IRQ5 (IRQ_INTERNAL_BASE + 25)
H A Dbcm63xx_irq.h6 #define IRQ_INTERNAL_BASE 8 macro
/linux-4.1.27/arch/mips/bcm63xx/
H A Dirq.c51 do_IRQ(intbit + IRQ_INTERNAL_BASE); handle_internal()
116 unsigned irq = d->irq - IRQ_INTERNAL_BASE; \
138 unsigned irq = d->irq - IRQ_INTERNAL_BASE; \
450 ext_irq_start = BCM_6328_EXT_IRQ0 - IRQ_INTERNAL_BASE; bcm63xx_init_irq()
451 ext_irq_end = BCM_6328_EXT_IRQ3 - IRQ_INTERNAL_BASE; bcm63xx_init_irq()
489 ext_irq_start = BCM_6358_EXT_IRQ0 - IRQ_INTERNAL_BASE; bcm63xx_init_irq()
490 ext_irq_end = BCM_6358_EXT_IRQ3 - IRQ_INTERNAL_BASE; bcm63xx_init_irq()
501 ext_irq_start = BCM_6362_EXT_IRQ0 - IRQ_INTERNAL_BASE; bcm63xx_init_irq()
502 ext_irq_end = BCM_6362_EXT_IRQ3 - IRQ_INTERNAL_BASE; bcm63xx_init_irq()
513 ext_irq_start = BCM_6368_EXT_IRQ0 - IRQ_INTERNAL_BASE; bcm63xx_init_irq()
514 ext_irq_end = BCM_6368_EXT_IRQ5 - IRQ_INTERNAL_BASE; bcm63xx_init_irq()
539 for (i = IRQ_INTERNAL_BASE; i < NR_IRQS; ++i) arch_init_irq()

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