| /linux-4.1.27/arch/mips/pci/ |
| H A D | fixup-capcella.c | 28 #define INT1 RTL8139_1_IRQ macro
36 [11] = { -1, INT1, INT1, INT1, INT1 },
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| /linux-4.1.27/arch/m32r/include/asm/ |
| H A D | irq.h | 10 * ICU of M32700UT-on-board PLD: 32 interrupts cascaded to INT1# chip pin
23 * ICU of M32700UT-on-board PLD: 32 interrupts cascaded to INT1# chip pin
47 * ICU of OPSPUT-on-board PLD: 32 interrupts cascaded to INT1# chip pin
72 * ICU of M32104UT-on-board PLD: 32 interrupts cascaded to INT1# chip pin
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| H A D | m32102.h | 177 #define M32R_ICU_CR2_PORTL (0x204+M32R_ICU_OFFSET) /* INT1 */
239 #define M32R_IRQ_INT1 (2) /* INT1 */
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| H A D | m32r_mp_fpga.h | 220 #define M32R_ICU_CR2_PORTL (0x204+M32R_ICU_OFFSET) /* INT1 */
276 #define M32R_IRQ_INT1 (2) /* INT1 */
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| /linux-4.1.27/drivers/iio/accel/ |
| H A D | st_accel.h | 31 * @drdy_int_pin: default accel DRDY is available on INT1 pin.
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| /linux-4.1.27/drivers/iio/pressure/ |
| H A D | st_pressure.h | 23 * @drdy_int_pin: default press DRDY is available on INT1 pin.
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| /linux-4.1.27/include/media/ |
| H A D | adv7604.h | 75 /* INT1 Configuration (IO register 0x40, [1:0]) */
119 /* Configuration of the INT1 pin */
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| /linux-4.1.27/arch/mips/loongson/loongson-3/ |
| H A D | irq.c | 108 /* route HT1 int0 ~ int7 to cpu core0 INT1*/ irq_router_init()
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| /linux-4.1.27/arch/mips/loongson1/common/ |
| H A D | irq.c | 98 ls1x_irq_dispatch(1); /* INT1 */ plat_irq_dispatch()
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| /linux-4.1.27/arch/m32r/platforms/mappi/ |
| H A D | setup.c | 116 /* INT1 : pccard0 interrupt */ init_IRQ()
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| /linux-4.1.27/arch/m32r/platforms/mappi2/ |
| H A D | setup.c | 116 /* INT1 : USB Host controller interrupt */ init_IRQ()
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| /linux-4.1.27/arch/m32r/platforms/mappi3/ |
| H A D | setup.c | 115 /* INT1 : USB Host controller interrupt */ init_IRQ()
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| /linux-4.1.27/arch/m68k/68000/ |
| H A D | m68VZ328.c | 89 /* INT1 enable (cs8900 IRQ) */ init_hardware()
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| /linux-4.1.27/drivers/mfd/ |
| H A D | max8997-irq.c | 196 /* PMIC INT1 ~ INT4 */ max8997_irq_thread()
217 /* MUIC INT1 ~ INT3 */ max8997_irq_thread()
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| H A D | 88pm805.c | 109 /* INT1 */
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| H A D | tps65090.c | 77 /* INT1 IRQs*/
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| H A D | max14577.c | 202 /* INT1 interrupts */
230 /* INT1 interrupts */
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| H A D | palmas.c | 50 /* INT1 IRQs */
177 /* INT1 IRQs */
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| H A D | as3722.c | 83 /* INT1 IRQs */
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| H A D | pcf50633-irq.c | 155 dev_dbg(pcf->dev, "INT1=0x%02x INT2=0x%02x INT3=0x%02x " pcf50633_irq()
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| H A D | tps65218.c | 146 /* INT1 IRQs */
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| H A D | max77686.c | 136 /* INT1 interrupts */
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| H A D | 88pm800.c | 187 /* INT1 */
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| H A D | twl4030-irq.c | 241 * That is, the interrupts are seen on both INT1 and INT2 lines.
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| /linux-4.1.27/drivers/extcon/ |
| H A D | extcon-sm5502.h | 246 /* INT1 */
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| H A D | extcon-rt8973a.c | 187 /* INT1 interrupts */
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| H A D | extcon-sm5502.c | 177 /* INT1 interrupts */
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| H A D | extcon-max77843.c | 185 /* INT1 interrupt */
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| /linux-4.1.27/arch/m32r/platforms/usrv/ |
| H A D | setup.c | 207 * INT1# is used for UART, MMC, CF Controller in FPGA. init_IRQ()
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| /linux-4.1.27/arch/m68k/include/asm/ |
| H A D | MC68328.h | 273 #define INT1_IRQ_NUM 9 /* External INT1 */
304 #define IMR_MINT1 (1 << INT1_IRQ_NUM) /* Mask External INT1 */
338 #define IWR_INT1 (1 << INT1_IRQ_NUM) /* External INT1 */
368 #define ISR_INT1 (1 << INT1_IRQ_NUM) /* External INT1 */
402 #define IPR_INT1 (1 << INT1_IRQ_NUM) /* External INT1 */
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| H A D | MC68EZ328.h | 236 #define INT1_IRQ_NUM 9 /* External INT1 */
262 #define IMR_MINT1 (1 << INT1_IRQ_NUM) /* Mask External INT1 */
291 #define ISR_INT1 (1 << INT1_IRQ_NUM) /* External INT1 */
320 #define IPR_INT1 (1 << INT1_IRQ_NUM) /* External INT1 */
426 #define PD_INT1 0x02 /* Use INT1 as PD[1] */
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| H A D | MC68VZ328.h | 240 #define INT1_IRQ_NUM 9 /* External INT1 */
272 #define IMR_MINT1 (1 << INT1_IRQ_NUM) /* Mask External INT1 */
301 #define ISR_INT1 (1 << INT1_IRQ_NUM) /* External INT1 */
330 #define IPR_INT1 (1 << INT1_IRQ_NUM) /* External INT1 */
436 #define PD_INT1 0x02 /* Use INT1 as PD[1] */
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| /linux-4.1.27/arch/m68k/mac/ |
| H A D | iop.c | 83 * Two sets of host interrupts are provided, INT0 and INT1. Both appear on one
86 * channels have gone to the MSG_COMPLETE state and it will raise INT1 when one
603 if (iop->status_ctrl & IOP_INT1) { /* INT1 for incoming msgs */ iop_ism_irq()
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| /linux-4.1.27/drivers/net/ethernet/toshiba/ |
| H A D | ps3_gelic_net.h | 45 /* INT1 */
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| /linux-4.1.27/drivers/acpi/acpica/ |
| H A D | exdebug.c | 63 * Store(INT1, Debug)
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| /linux-4.1.27/arch/m32r/platforms/m32700ut/ |
| H A D | setup.c | 343 * INT1# is used for UART, MMC, CF Controller in FPGA. init_IRQ()
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| /linux-4.1.27/arch/m32r/platforms/opsput/ |
| H A D | setup.c | 343 * INT1# is used for UART, MMC, CF Controller in FPGA. init_IRQ()
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| /linux-4.1.27/sound/pcmcia/pdaudiocf/ |
| H A D | pdaudiocf_core.c | 195 /* from AK4117 then INT1 pin from AK4117 will be high all time, because PCMCIA interrupts are */ snd_pdacf_ak4117_create()
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| /linux-4.1.27/include/linux/iio/common/ |
| H A D | st_sensors.h | 120 * @mask_int1: mask to enable/disable IRQ on INT1 pin.
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| /linux-4.1.27/sound/soc/codecs/ |
| H A D | tlv320aic31xx.h | 109 /* INT1 interrupt control */
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| /linux-4.1.27/include/linux/mfd/ |
| H A D | max77843-private.h | 161 /* MUIC: INT1 */
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| H A D | tps65218.h | 218 /* INT1 registers */
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| H A D | max14577-private.h | 409 /* INT1 */
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| H A D | max77693-private.h | 507 /* MUIC INT1 */
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| H A D | palmas.h | 440 /* INT1 registers */
482 /* INT1 registers */
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| /linux-4.1.27/include/sound/ |
| H A D | ak4113.h | 217 /* mask enable for DAT bit (if 1, no INT1 effect */
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| /linux-4.1.27/drivers/ipack/carriers/ |
| H A D | tpci200.c | 326 * INT1 disabled, level sensitive tpci200_register()
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| /linux-4.1.27/drivers/iio/common/st_sensors/ |
| H A D | st_sensors_core.c | 252 "DRDY on INT1 not available.\n"); st_sensors_set_drdy_int_pin()
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| /linux-4.1.27/drivers/input/keyboard/ |
| H A D | twl4030_keypad.c | 422 * NOTE: we assume this host is wired to TWL4040 INT1, not INT2 ... twl4030_kp_probe()
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| /linux-4.1.27/drivers/power/ |
| H A D | lp8727_charger.c | 49 /* INT1 register */
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| /linux-4.1.27/arch/blackfin/mach-bf548/include/mach/ |
| H A D | irq.h | 88 #define IRQ_USB_INT1 BFIN_IRQ(76) /* USB INT1 Interrupt */
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| /linux-4.1.27/arch/m32r/kernel/ |
| H A D | entry.S | 350 add3 r2, r0, #-(M32R_IRQ_INT1) ; INT1# interrupt
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| /linux-4.1.27/include/linux/input/ |
| H A D | adxl34x.h | 301 * Use ADXL34x INT2 pin instead of INT1 pin for interrupt output
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| /linux-4.1.27/drivers/rtc/ |
| H A D | rtc-ds1305.c | 261 * + On DS1306 ALM1 only uses INT1 (an active high pulse)
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| /linux-4.1.27/drivers/input/misc/ |
| H A D | adxl34x.c | 856 /* Map all INTs to INT1 */ adxl34x_probe()
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| /linux-4.1.27/arch/arc/kernel/ |
| H A D | entry.S | 145 #include <asm/entry.h> /* SAVE_ALL_{INT1,INT2,SYS...} */
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| /linux-4.1.27/drivers/gpu/drm/panel/ |
| H A D | panel-s6e8aa0.c | 219 /* INT1,2_CON */ s6e8aa0_panel_cond_set_v142()
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| /linux-4.1.27/drivers/media/i2c/ |
| H A D | adv7842.c | 2634 io_write(sd, 0x40, 0xf2); /* Configure INT1 */ adv7842_core_init()
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| H A D | adv7604.c | 2429 io_write(sd, 0x40, 0xc0 | pdata->int1_config); /* Configure INT1 */ adv76xx_core_init()
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