Searched refs:IMX6SL_CLK_USBPHY2_GATE (Results 1 - 7 of 7) sorted by relevance

/linux-4.1.27/arch/mips/boot/dts/include/dt-bindings/clock/
H A Dimx6sl-clock.h26 #define IMX6SL_CLK_USBPHY2_GATE 13 macro
/linux-4.1.27/arch/powerpc/boot/dts/include/dt-bindings/clock/
H A Dimx6sl-clock.h26 #define IMX6SL_CLK_USBPHY2_GATE 13 macro
/linux-4.1.27/arch/arm64/boot/dts/include/dt-bindings/clock/
H A Dimx6sl-clock.h26 #define IMX6SL_CLK_USBPHY2_GATE 13 macro
/linux-4.1.27/arch/metag/boot/dts/include/dt-bindings/clock/
H A Dimx6sl-clock.h26 #define IMX6SL_CLK_USBPHY2_GATE 13 macro
/linux-4.1.27/arch/arm/boot/dts/include/dt-bindings/clock/
H A Dimx6sl-clock.h26 #define IMX6SL_CLK_USBPHY2_GATE 13 macro
/linux-4.1.27/include/dt-bindings/clock/
H A Dimx6sl-clock.h26 #define IMX6SL_CLK_USBPHY2_GATE 13 macro
/linux-4.1.27/arch/arm/mach-imx/
H A Dclk-imx6sl.c262 clks[IMX6SL_CLK_USBPHY2_GATE] = imx_clk_gate("usbphy2_gate", "dummy", base + 0x20, 6); imx6sl_clocks_init()
434 clk_prepare_enable(clks[IMX6SL_CLK_USBPHY2_GATE]); imx6sl_clocks_init()

Completed in 68 milliseconds