Searched refs:IMX6QDL_CLK_PLL4_AUDIO_DIV (Results 1 - 7 of 7) sorted by relevance

/linux-4.1.27/arch/mips/boot/dts/include/dt-bindings/clock/
H A Dimx6qdl-clock.h216 #define IMX6QDL_CLK_PLL4_AUDIO_DIV 203 macro
/linux-4.1.27/arch/powerpc/boot/dts/include/dt-bindings/clock/
H A Dimx6qdl-clock.h216 #define IMX6QDL_CLK_PLL4_AUDIO_DIV 203 macro
/linux-4.1.27/arch/arm64/boot/dts/include/dt-bindings/clock/
H A Dimx6qdl-clock.h216 #define IMX6QDL_CLK_PLL4_AUDIO_DIV 203 macro
/linux-4.1.27/arch/metag/boot/dts/include/dt-bindings/clock/
H A Dimx6qdl-clock.h216 #define IMX6QDL_CLK_PLL4_AUDIO_DIV 203 macro
/linux-4.1.27/arch/arm/boot/dts/include/dt-bindings/clock/
H A Dimx6qdl-clock.h216 #define IMX6QDL_CLK_PLL4_AUDIO_DIV 203 macro
/linux-4.1.27/include/dt-bindings/clock/
H A Dimx6qdl-clock.h216 #define IMX6QDL_CLK_PLL4_AUDIO_DIV 203 macro
/linux-4.1.27/arch/arm/mach-imx/
H A Dclk-imx6q.c257 clk[IMX6QDL_CLK_PLL4_AUDIO_DIV] = clk_register_divider(NULL, "pll4_audio_div", "pll4_post_div", CLK_SET_RATE_PARENT, base + 0x170, 15, 1, 0, &imx_ccm_lock); imx6q_clocks_init()

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