Searched refs:IMX5_CLK_USB_PHY2_GATE (Results 1 - 7 of 7) sorted by relevance

/linux-4.1.27/arch/mips/boot/dts/include/dt-bindings/clock/
H A Dimx5-clock.h137 #define IMX5_CLK_USB_PHY2_GATE 125 macro
/linux-4.1.27/arch/powerpc/boot/dts/include/dt-bindings/clock/
H A Dimx5-clock.h137 #define IMX5_CLK_USB_PHY2_GATE 125 macro
/linux-4.1.27/arch/arm64/boot/dts/include/dt-bindings/clock/
H A Dimx5-clock.h137 #define IMX5_CLK_USB_PHY2_GATE 125 macro
/linux-4.1.27/arch/metag/boot/dts/include/dt-bindings/clock/
H A Dimx5-clock.h137 #define IMX5_CLK_USB_PHY2_GATE 125 macro
/linux-4.1.27/arch/arm/boot/dts/include/dt-bindings/clock/
H A Dimx5-clock.h137 #define IMX5_CLK_USB_PHY2_GATE 125 macro
/linux-4.1.27/include/dt-bindings/clock/
H A Dimx5-clock.h137 #define IMX5_CLK_USB_PHY2_GATE 125 macro
/linux-4.1.27/arch/arm/mach-imx/
H A Dclk-imx51-imx53.c348 clk[IMX5_CLK_USB_PHY2_GATE] = imx_clk_gate2("usb_phy2_gate", "usb_phy_sel", MXC_CCM_CCGR4, 12); mx50_clocks_init()
522 clk[IMX5_CLK_USB_PHY2_GATE] = imx_clk_gate2("usb_phy2_gate", "usb_phy_sel", MXC_CCM_CCGR4, 12); mx53_clocks_init()

Completed in 80 milliseconds